[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp LiveIntervals.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/CodeGen:

RegAllocLinearScan.cpp updated: 1.21 -> 1.22
LiveIntervals.cpp updated: 1.17 -> 1.18

---
Log message:

Remove simple coalescing.


---
Diffs of the changes:  (+0 -26)

Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.21 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.22
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.21	Sun Dec 28 12:03:52 2003
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp	Mon Jan  5 02:24:57 2004
@@ -617,17 +617,6 @@
     DEBUG(std::cerr << "\t\tgetting free physical register: ");
     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
 
-    if (unsigned reg = cur->hint) {
-        if (reg >= MRegisterInfo::FirstVirtualRegister &&
-            v2pMap_.find(reg) != v2pMap_.end())
-            reg = v2pMap_[reg];
-        if (reg && reg < MRegisterInfo::FirstVirtualRegister &&
-            mri_->getRegClass(reg) == rc && !regUse_[reg]) {
-            DEBUG(std::cerr << mri_->getName(reg) << '\n');
-            return reg;
-        }
-    }
-            
     for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
          i != rc->allocation_order_end(*mf_); ++i) {
         unsigned reg = *i;


Index: llvm/lib/CodeGen/LiveIntervals.cpp
diff -u llvm/lib/CodeGen/LiveIntervals.cpp:1.17 llvm/lib/CodeGen/LiveIntervals.cpp:1.18
--- llvm/lib/CodeGen/LiveIntervals.cpp:1.17	Sun Dec 28 11:58:18 2003
+++ llvm/lib/CodeGen/LiveIntervals.cpp	Mon Jan  5 02:24:57 2004
@@ -131,21 +131,6 @@
                 assert(r2iit != r2iMap_.end());
                 intervals_[r2iit->second].weight += pow(10.0F, loopDepth);
             }
-
-            // add hints for coalescing
-            unsigned src, dst;
-            if (tii.isMoveInstr(*instr, src, dst)) {
-                if (src >= MRegisterInfo::FirstVirtualRegister) {
-                    Reg2IntervalMap::iterator r2iit = r2iMap_.find(src);
-                    assert(r2iit != r2iMap_.end());
-                    intervals_[r2iit->second].hint = dst;
-                }
-                if (dst >= MRegisterInfo::FirstVirtualRegister) {
-                    Reg2IntervalMap::iterator r2iit = r2iMap_.find(dst);
-                    assert(r2iit != r2iMap_.end());
-                    intervals_[r2iit->second].hint = src;
-                }
-            }
         }
     }