[llvm-commits] CVS: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp

Alkis Evlogimenos alkis at cs.uiuc.edu
Sun Jan 4 20:26:01 PST 2004


Changes in directory llvm/lib/CodeGen:

TwoAddressInstructionPass.cpp updated: 1.3 -> 1.4

---
Log message:

Currently we cannot handle two-address instructions of the form:
A = B op C where A == C, but this cannot really occur in practice
because of SSA form. Add an assert to check that just to be safe.


---
Diffs of the changes:  (+9 -0)

Index: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
diff -u llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.3 llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.4
--- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.3	Sun Jan  4 17:09:24 2004
+++ llvm/lib/CodeGen/TwoAddressInstructionPass.cpp	Sun Jan  4 20:25:45 2004
@@ -123,6 +123,15 @@
             bool regAisPhysical = regA < MRegisterInfo::FirstVirtualRegister;
             bool regBisPhysical = regB < MRegisterInfo::FirstVirtualRegister;
 
+            // first make sure we do not have a use of a in the
+            // instruction (a = b + a for example) because our
+            // transofrmation will not work. This should never occur
+            // because of SSA.
+            for (unsigned i = 1; i < mi->getNumOperands(); ++i) {
+                assert(!mi->getOperand(i).isRegister() ||
+                       mi->getOperand(i).getAllocatedRegNum() != regA);
+            }
+
             const TargetRegisterClass* rc = regAisPhysical ?
                 mri_->getRegClass(regA) :
                 mf_->getSSARegMap()->getRegClass(regA);





More information about the llvm-commits mailing list