[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/CodeGen:

RegAllocLinearScan.cpp updated: 1.18 -> 1.19

---
Log message:

Improve debugging output when choosing a register to spill.


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Diffs of the changes:  (+3 -8)

Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.18 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.19
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.18	Tue Dec 23 12:00:33 2003
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp	Wed Dec 24 12:53:31 2003
@@ -552,8 +552,7 @@
 
     if (cur->weight < minWeight) {
         restoreRegUse();
-        DEBUG(std::cerr << "\t\t\t\tspilling : " << mri_->getName(minReg)
-              << ", weight: " << cur->weight << '\n');
+        DEBUG(std::cerr << "\t\t\t\tspilling : " << *cur << '\n');
         assignVirt2StackSlot(cur->reg);
     }
     else {
@@ -570,9 +569,7 @@
                 toSpill.find(v2pMap_[reg]) != toSpill.end() &&
                 cur->overlaps(**i)) {
                 spilled.push_back(v2pMap_[reg]);
-                DEBUG(std::cerr << "\t\t\t\tspilling : "
-                      << mri_->getName(minReg) << ", weight: "
-                      << (*i)->weight << '\n');
+                DEBUG(std::cerr << "\t\t\t\tspilling : " << **i << '\n');
                 assignVirt2StackSlot(reg);
                 i = active_.erase(i);
             }
@@ -586,9 +583,7 @@
             if (reg >= MRegisterInfo::FirstVirtualRegister &&
                 toSpill.find(v2pMap_[reg]) != toSpill.end() &&
                 cur->overlaps(**i)) {
-                DEBUG(std::cerr << "\t\t\t\tspilling : "
-                      << mri_->getName(minReg) << ", weight: "
-                      << (*i)->weight << '\n');
+                DEBUG(std::cerr << "\t\t\t\tspilling : " << **i << '\n');
                 assignVirt2StackSlot(reg);
                 i = inactive_.erase(i);
             }