[llvm-commits] CVS: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp

[Brian Gaeke]

Changes in directory reopt/lib/LightWtProfiling:

UnpackTraceFunction.cpp updated: 1.22 -> 1.23

---
Log message:

Remove the bitrot induced by Misha's recent changes.

---
Diffs of the changes:  (+7 -6)

Index: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp
diff -u reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.22 reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.23
--- reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.22	Wed Nov 19 16:51:49 2003
+++ reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp	Thu Dec 18 16:35:09 2003
@@ -8,7 +8,8 @@
 #include "TraceToFunction.h"
 #include "../../../../lib/CodeGen/RegAlloc/AllocInfo.h"
 #include "../../../../lib/CodeGen/RegAlloc/PhyRegAlloc.h"
-#include "../../../../lib/Target/Sparc/SparcInternals.h"
+#include "../../../../lib/Target/Sparc/SparcTargetMachine.h"
+#include "../../../../lib/Target/Sparc/SparcRegInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Support/InstIterator.h"
@@ -23,17 +24,17 @@
 ///
 void insertCopyMachineInstrs (AllocInfo &Source, AllocInfo &Target,
                               MachineBasicBlock &B, const Type *Ty) {
-  UltraSparc TM;
+  SparcTargetMachine TM;
   const TargetRegInfo &TRI = TM.getRegInfo ();
   std::vector<MachineInstr *> mvec;
   int RegType;
   // Guess what kind of reg the register was allocated to.
   if (Ty == Type::FloatTy)
-    RegType = UltraSparcRegInfo::FPSingleRegType;
+    RegType = SparcRegInfo::FPSingleRegType;
   else if (Ty == Type::DoubleTy)
-    RegType = UltraSparcRegInfo::FPDoubleRegType;
+    RegType = SparcRegInfo::FPDoubleRegType;
   else
-    RegType = UltraSparcRegInfo::IntRegType;
+    RegType = SparcRegInfo::IntRegType;
   const unsigned FramePtrReg = TRI.getFramePointer ();
   const unsigned StackPtrReg = TRI.getStackPointer ();
   if (Source.AllocState == AllocInfo::Spilled
@@ -53,7 +54,7 @@
   } else if (Source.AllocState == AllocInfo::Spilled
              && Target.AllocState == AllocInfo::Spilled) {
     const unsigned TempReg = 
-      TRI.getUnifiedRegNum (UltraSparcRegInfo::IntRegClassID,
+      TRI.getUnifiedRegNum (SparcRegInfo::IntRegClassID,
                             SparcIntRegClass::g1); // just pick one?
     // Emit load instruction from stack loc. Source into register TempReg
     TRI.cpMem2RegMI (mvec, FramePtrReg, Source.Placement, TempReg, RegType);