[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp X86.h FloatingPoint.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/Target/X86:

X86TargetMachine.cpp updated: 1.38 -> 1.39
X86.h updated: 1.22 -> 1.23
FloatingPoint.cpp updated: 1.11 -> 1.12

---
Log message:

Add a floating point killer pass. This pass runs before register
allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.


---
Diffs of the changes:  (+68 -0)

Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.38 llvm/lib/Target/X86/X86TargetMachine.cpp:1.39
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.38	Sun Nov 30 23:18:30 2003
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Fri Dec 12 23:36:19 2003
@@ -76,6 +76,11 @@
   if (PrintCode)
     PM.add(createMachineFunctionPrinterPass());
 
+  // kill floating point registers at the end of basic blocks. this is
+  // done because the floating point register stackifier cannot handle
+  // floating point regs that are live across basic blocks.
+  PM.add(createX86FloatingPointKillerPass());
+
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
 
@@ -128,6 +133,11 @@
   // Print the instruction selected machine code...
   if (PrintCode)
     PM.add(createMachineFunctionPrinterPass());
+
+  // kill floating point registers at the end of basic blocks. this is
+  // done because the floating point register stackifier cannot handle
+  // floating point regs that are live across basic blocks.
+  PM.add(createX86FloatingPointKillerPass());
 
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());


Index: llvm/lib/Target/X86/X86.h
diff -u llvm/lib/Target/X86/X86.h:1.22 llvm/lib/Target/X86/X86.h:1.23
--- llvm/lib/Target/X86/X86.h:1.22	Sun Nov 30 23:18:30 2003
+++ llvm/lib/Target/X86/X86.h	Fri Dec 12 23:36:21 2003
@@ -44,6 +44,12 @@
 ///
 FunctionPass *createX86PeepholeOptimizerPass();
 
+/// createX86FloatingPointKiller - This function returns a pass which
+/// kills every floating point register at the end of each basic block
+/// because our FloatingPointStackifier cannot handle them.
+///
+FunctionPass *createX86FloatingPointKillerPass();
+
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
 /// floating point stack references and physical instructions.


Index: llvm/lib/Target/X86/FloatingPoint.cpp
diff -u llvm/lib/Target/X86/FloatingPoint.cpp:1.11 llvm/lib/Target/X86/FloatingPoint.cpp:1.12
--- llvm/lib/Target/X86/FloatingPoint.cpp:1.11	Tue Nov 11 16:41:33 2003
+++ llvm/lib/Target/X86/FloatingPoint.cpp	Fri Dec 12 23:36:22 2003
@@ -18,6 +18,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/Passes.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "Support/Debug.h"
@@ -599,6 +600,57 @@
   }
 
   I = MBB->erase(I)-1;  // Remove the pseudo instruction
+}
+
+namespace {
+
+  struct FPK : public MachineFunctionPass {
+    virtual const char *getPassName() const { return "X86 FP Killer"; }
+    virtual bool runOnMachineFunction(MachineFunction &MF);
+      virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+          AU.setPreservesAll();
+          AU.addRequired<LiveVariables>();
+          AU.addRequiredID(PHIEliminationID);
+          MachineFunctionPass::getAnalysisUsage(AU);
+      }
+  };
+}
+
+FunctionPass * createX86FloatingPointKillerPass() { return new FPK(); }
+
+bool FPK::runOnMachineFunction(MachineFunction &MF)
+{
+  const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
+
+  for (MachineFunction::iterator
+           mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
+    MachineBasicBlock& mbb = *mbbi;
+    MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
+    // rewind to the last non terminating instruction
+    while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode())) {
+      ++mii;
+    }
+    // add implicit def for all virtual floating point registers so that
+    // they are spilled at the end of each basic block, since our
+    // register stackifier doesn't handle them otherwise.
+    MachineInstr* instr = BuildMI(X86::IMPLICIT_DEF, 7)
+        .addReg(X86::FP6, MOTy::Def)
+        .addReg(X86::FP5, MOTy::Def)
+        .addReg(X86::FP4, MOTy::Def)
+        .addReg(X86::FP3, MOTy::Def)
+        .addReg(X86::FP2, MOTy::Def)
+        .addReg(X86::FP1, MOTy::Def)
+        .addReg(X86::FP0, MOTy::Def);
+        
+    mbb.insert(mii.base(), instr);
+    LiveVariables& lv = getAnalysis<LiveVariables>();
+    for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
+        lv.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
+        // force live variables to compute that these registers are dead
+        lv.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
+    }
+  }
+  return true;
 }
 
 } // End llvm namespace