[llvm-commits] [regalloc_linearscan] CVS: llvm/lib/CodeGen/LiveIntervals.cpp
Alkis Evlogimenos
alkis at cs.uiuc.edu
Thu Nov 13 03:50:12 PST 2003
Changes in directory llvm/lib/CodeGen:
LiveIntervals.cpp updated: 1.1.2.9 -> 1.1.2.10
---
Log message:
Add support for computing live intervals of physical registers. This
is currently disabled because the register allocator doesn't know how
to handle them.
---
Diffs of the changes: (+99 -10)
Index: llvm/lib/CodeGen/LiveIntervals.cpp
diff -u llvm/lib/CodeGen/LiveIntervals.cpp:1.1.2.9 llvm/lib/CodeGen/LiveIntervals.cpp:1.1.2.10
--- llvm/lib/CodeGen/LiveIntervals.cpp:1.1.2.9 Wed Nov 12 00:49:55 2003
+++ llvm/lib/CodeGen/LiveIntervals.cpp Thu Nov 13 03:48:51 2003
@@ -59,6 +59,7 @@
tm_ = &fn.getTarget();
mri_ = tm_->getRegisterInfo();
lv_ = &getAnalysis<LiveVariables>();
+ allocatableRegisters_.clear();
mbbi2mbbMap_.clear();
mi2iMap_.clear();
r2iMap_.clear();
@@ -67,6 +68,20 @@
mii2mbbMap_.clear();
mbb2miiMap_.clear();
+ // mark allocatable registers
+ allocatableRegisters_.resize(MRegisterInfo::FirstVirtualRegister);
+ // Loop over all of the register classes...
+ for (MRegisterInfo::regclass_iterator
+ rci = mri_->regclass_begin(), rce = mri_->regclass_end();
+ rci != rce; ++rci) {
+ // Loop over all of the allocatable registers in the function...
+ for (TargetRegisterClass::iterator
+ i = (*rci)->allocation_order_begin(*mf_),
+ e = (*rci)->allocation_order_end(*mf_); i != e; ++i) {
+ allocatableRegisters_[*i] = true; // The reg is allocatable!
+ }
+ }
+
// number MachineInstrs
unsigned miIndex = 0;
for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end();
@@ -103,13 +118,13 @@
std::cerr << '%' << reg;
}
-void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb,
- MachineInstr* instr,
- unsigned reg)
+void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
+ MachineBasicBlock::iterator mi,
+ unsigned reg)
{
DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
- unsigned instrIndex = getInstructionIndex(instr);
+ unsigned instrIndex = getInstructionIndex(*mi);
LiveVariables::VarInfo& vi = lv_->getVarInfo(reg);
@@ -155,10 +170,10 @@
unsigned start = (mbb == killerBlock ?
instrIndex :
getInstructionIndex(killerBlock->front()));
- unsigned end = getInstructionIndex(killerInstr) + 1;
- DEBUG(std::cerr << "\t\t\t\tadding range: ["
- << start << ',' << end << "]\n");
- interval.addRange(start, end);
+ unsigned end = getInstructionIndex(killerInstr) + 1;
+ DEBUG(std::cerr << "\t\t\t\tadding range: ["
+ << start << ',' << end << "]\n");
+ interval.addRange(start, end);
}
if (!killedInDefiningBasicBlock) {
@@ -170,6 +185,74 @@
}
}
+void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb,
+ MachineBasicBlock::iterator mi,
+ unsigned reg)
+{
+ DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
+
+ unsigned start = getInstructionIndex(*mi);
+ unsigned end = start;
+
+ for (MachineBasicBlock::iterator e = mbb->end(); mi != e; ++mi) {
+ for (LiveVariables::killed_iterator
+ ki = lv_->dead_begin(*mi),
+ ke = lv_->dead_end(*mi);
+ ki != ke; ++ki) {
+ if (reg == ki->second) {
+ end = getInstructionIndex(ki->first) + 1;
+ goto exit;
+ }
+ }
+
+ for (LiveVariables::killed_iterator
+ ki = lv_->killed_begin(*mi),
+ ke = lv_->killed_end(*mi);
+ ki != ke; ++ki) {
+ if (reg == ki->second) {
+ end = getInstructionIndex(ki->first) + 1;
+ goto exit;
+ }
+ }
+ }
+exit:
+ assert(start < end && "did not find end of interval?");
+
+ Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
+ if (r2iit != r2iMap_.end()) {
+ unsigned ii = r2iit->second;
+ Interval& interval = intervals_[ii];
+ DEBUG(std::cerr << "\t\t\t\tadding range: ["
+ << start << ',' << end << "]\n");
+ interval.addRange(start, end);
+ DEBUG(std::cerr << "\t\t\t\t" << interval << '\n');
+ }
+ else {
+ intervals_.push_back(Interval(reg));
+ Interval& interval = intervals_.back();
+ // update interval index for this register
+ r2iMap_[reg] = intervals_.size() - 1;
+ DEBUG(std::cerr << "\t\t\t\tadding range: ["
+ << start << ',' << end << "]\n");
+ interval.addRange(start, end);
+ DEBUG(std::cerr << "\t\t\t\t" << interval << '\n');
+ }
+}
+
+void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb,
+ MachineBasicBlock::iterator mi,
+ unsigned reg)
+{
+ if (reg < MRegisterInfo::FirstVirtualRegister) {
+ if (allocatableRegisters_[reg]) {
+ handlePhysicalRegisterDef(mbb, mi, reg);
+ }
+ }
+ else {
+ handleVirtualRegisterDef(mbb, mi, reg);
+ }
+}
+
unsigned LiveIntervals::getInstructionIndex(MachineInstr* instr) const
{
assert(mi2iMap_.find(instr) != mi2iMap_.end() &&
@@ -200,6 +283,13 @@
<< getInstructionIndex(instr) << "]: ";
instr->print(std::cerr, *tm_););
+ // handle implicit defs
+// for (const unsigned* id = tid.ImplicitDefs; *id; ++id) {
+// unsigned physReg = *id;
+// handlePhysicalRegisterDef(mbb, mi, physReg);
+// }
+
+ // handle explicit defs
for (int i = instr->getNumOperands() - 1; i >= 0; --i) {
MachineOperand& mop = instr->getOperand(i);
@@ -208,8 +298,7 @@
if (mop.opIsDefOnly() || mop.opIsDefAndUse()) {
unsigned reg = mop.getAllocatedRegNum();
-
- handleRegisterDef(mbb, instr, reg);
+ handleVirtualRegisterDef(mbb, mi, reg);
}
}
}
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