[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.h X86RegisterInfo.cpp
Alkis Evlogimenos
alkis at cs.uiuc.edu
Tue Nov 4 16:58:01 PST 2003
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.h updated: 1.16 -> 1.17
X86RegisterInfo.cpp updated: 1.38 -> 1.39
---
Log message:
Change all machine basic block modifier functions in MRegisterInfo to
return the number of instructions added to/removed from the basic block
passed as their first argument.
Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.
---
Diffs of the changes: (+53 -40)
Index: llvm/lib/Target/X86/X86RegisterInfo.h
diff -u llvm/lib/Target/X86/X86RegisterInfo.h:1.16 llvm/lib/Target/X86/X86RegisterInfo.h:1.17
--- llvm/lib/Target/X86/X86RegisterInfo.h:1.16 Tue Oct 21 10:17:13 2003
+++ llvm/lib/Target/X86/X86RegisterInfo.h Tue Nov 4 16:57:09 2003
@@ -25,31 +25,31 @@
const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
/// Code Generation virtual methods...
- void storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- unsigned SrcReg, int FrameIndex,
- const TargetRegisterClass *RC) const;
+ int storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ unsigned SrcReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
- void loadRegFromStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- unsigned DestReg, int FrameIndex,
- const TargetRegisterClass *RC) const;
+ int loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ unsigned DestReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
- void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
+ int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
- void eliminateCallFramePseudoInstr(MachineFunction &MF,
- MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &I) const;
+ int eliminateCallFramePseudoInstr(MachineFunction &MF,
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &I) const;
- void eliminateFrameIndex(MachineFunction &MF,
- MachineBasicBlock::iterator &II) const;
+ int eliminateFrameIndex(MachineFunction &MF,
+ MachineBasicBlock::iterator &II) const;
- void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
+ int processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
- void emitPrologue(MachineFunction &MF) const;
- void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+ int emitPrologue(MachineFunction &MF) const;
+ int emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
};
#endif
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.38 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.39
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.38 Mon Oct 20 14:43:18 2003
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Tue Nov 4 16:57:09 2003
@@ -44,36 +44,39 @@
}
}
-void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- unsigned SrcReg, int FrameIdx,
- const TargetRegisterClass *RC) const {
+int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ unsigned SrcReg, int FrameIdx,
+ const TargetRegisterClass *RC) const {
static const unsigned Opcode[] =
{ X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 };
MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
FrameIdx).addReg(SrcReg);
MBBI = MBB.insert(MBBI, MI)+1;
+ return 1;
}
-void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- unsigned DestReg, int FrameIdx,
- const TargetRegisterClass *RC) const{
+int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ unsigned DestReg, int FrameIdx,
+ const TargetRegisterClass *RC) const{
static const unsigned Opcode[] =
{ X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 };
MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 4, DestReg),
FrameIdx);
MBBI = MBB.insert(MBBI, MI)+1;
+ return 1;
}
-void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const {
+int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const {
static const unsigned Opcode[] =
{ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV };
MachineInstr *MI = BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg);
MBBI = MBB.insert(MBBI, MI)+1;
+ return 1;
}
//===----------------------------------------------------------------------===//
@@ -88,8 +91,8 @@
return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
}
-void X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
- MachineBasicBlock &MBB,
+int X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
+ MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) const {
MachineInstr *New = 0, *Old = *I;;
if (hasFP(MF)) {
@@ -113,15 +116,19 @@
}
}
- if (New)
+ if (New) {
*I = New; // Replace the pseudo instruction with a new instruction...
- else
+ delete Old;
+ return 0;
+ } else {
I = MBB.erase(I);// Just delete the pseudo instruction...
- delete Old;
+ delete Old;
+ return -1;
+ }
}
-void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
- MachineBasicBlock::iterator &II) const {
+int X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
+ MachineBasicBlock::iterator &II) const {
unsigned i = 0;
MachineInstr &MI = **II;
while (!MI.getOperand(i).isFrameIndex()) {
@@ -143,9 +150,10 @@
Offset += MF.getFrameInfo()->getStackSize();
MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
+ return 0;
}
-void X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
+int X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
const {
if (hasFP(MF)) {
// Create a frame entry for the EBP register that must be saved.
@@ -153,14 +161,16 @@
assert(FrameIdx == MF.getFrameInfo()->getObjectIndexEnd()-1 &&
"Slot for EBP register must be last in order to be found!");
}
+ return 0;
}
-void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
+int X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
MachineBasicBlock::iterator MBBI = MBB.begin();
MachineFrameInfo *MFI = MF.getFrameInfo();
MachineInstr *MI;
+ unsigned oldSize = MBB.size();
// Get the number of bytes to allocate from the FrameInfo
unsigned NumBytes = MFI->getStackSize();
if (hasFP(MF)) {
@@ -207,10 +217,12 @@
MBB.insert(MBBI, MI);
}
}
+ return MBB.size() - oldSize;
}
-void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
- MachineBasicBlock &MBB) const {
+int X86RegisterInfo::emitEpilogue(MachineFunction &MF,
+ MachineBasicBlock &MBB) const {
+ unsigned oldSize = MBB.size();
const MachineFrameInfo *MFI = MF.getFrameInfo();
MachineBasicBlock::iterator MBBI = MBB.end()-1;
MachineInstr *MI;
@@ -238,6 +250,7 @@
MBBI = 1+MBB.insert(MBBI, MI);
}
}
+ return MBB.size() - oldSize;
}
#include "X86GenRegisterInfo.inc"
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