[llvm-commits] CVS: llvm-www/www-index.html
Vikram Adve
vadve at cs.uiuc.edu
Sat Oct 25 11:44:01 PDT 2003
Changes in directory llvm-www:
www-index.html updated: 1.71 -> 1.72
---
Log message:
Moved RELEASE section to top of right column, so that Overview is the
top of the left column. Separated Current Development into separate
sections for research projects and ongoing development (and pulled research
into the left column).
---
Diffs of the changes: (+80 -38)
Index: llvm-www/www-index.html
diff -u llvm-www/www-index.html:1.71 llvm-www/www-index.html:1.72
--- llvm-www/www-index.html:1.71 Fri Oct 24 18:46:52 2003
+++ llvm-www/www-index.html Sat Oct 25 11:42:55 2003
@@ -21,21 +21,6 @@
<tr>
<td align="center" background="img/sidebars.gif"
- height="34"><a name="Releases"></a><font
- color="#000000" size="5"><b>Public LLVM Release!</b></font> </td>
- </tr>
- <tr>
- <td>
- The current version of LLVM is 1.0 is now <a
- href="releases/"><b>available for download</b></a>! LLVM is
- publically available under the <a
- href="http://www.opensource.org/licenses/UoI-NCSA.php">University
- of Illinois Open-Source License</a>.<br><p><p></td>
- </tr>
-
-
- <tr>
- <td align="center" background="img/sidebars.gif"
height="34"><a name="Overview"></a><font
color="#000000" size="5"><b>Overview</b></font> </td>
</tr>
@@ -90,6 +75,24 @@
</td>
</tr>
+ <tr>
+ <td align="center" background="img/sidebars.gif"
+ height="34"><a name="Funding"></a><font
+ color="#000000" size="5"><b>Funding</b></font> </td>
+ </tr>
+ <tr>
+ <td>
+ This work is sponsored by the
+ <a href="http://www.cise.nsf.gov/fndg/pubs/display2.cfm?pgm_pims_id=5160&pgm_supp_id=10070&loc=acir&pub_id=5372&div=acir">NSF <i>Next Generation Software Program<i></a>
+ through grants EIA-0093426 (an NSF CAREER
+ award) and EIA-0103756. It is also supported in part by the
+ NSF Operating Systems and Compilers program (grant
+ #CCR-9988482), by the NSF Embedded Systems Program (grant
+ #CCR-0209202), and by the MARCO/DARPA <a
+ href="http://www.gigascale.org/">Gigascale Systems Research
+ Center</a> (GSRC).<p><p>
+ </td>
+ </tr>
<tr>
<td align="center" background="img/sidebars.gif"
@@ -178,24 +181,77 @@
<tr>
<td align="center" background="img/sidebars.gif"
- height="34"><a name="Funding"></a><font
- color="#000000" size="5"><b>Funding</b></font> </td>
+ height="34"><a name="subprojects"></a><font
+ color="#000000" size="5"><b>Ongoing Research</b></font>
+ </td>
</tr>
<tr>
<td>
- This work is sponsored by an NSF CAREER award (grant
- #EIA-0093426), and supported in part by the NSF Next Generation
- Software Program (grant #EIA-0103756), the NSF Operating Systems
- and Compilers program (grant #CCR-9988482), by the NSF Embedded
- Systems Program (grant #CCR-0209202), and by the MARCO/DARPA <a
- href="http://www.gigascale.org/">Gigascale Systems Research
- Center</a> (GSRC).<p><p>
+ Our group is participating in several ongoing research
+ projects, all of which are based on LLVM:
+ <li><em><strong><a href="pubs/2003-10-01-LLVA.html">
+ Low Level Virtual Architecture (LLVA)</a></strong>:</em>
+ A Virtual Instruction Set Computer (VISC) architecture
+ decouples the external instruction set (V-ISA) seen by
+ all external software from the (possibly
+ implementation-specific) hardware ISA used by a
+ particular processor implementation (I-ISA). We
+ believe that a variant of LLVM (which we call Low
+ Level Virtual Architecture, or LLVA) could be a
+ powerful design choice for a V-ISA in such processor
+ designs.
+ We are exploring the architecture, compiler,
+ and operating system benefits of processor designs
+ based on LLVA as the virtual ISA.</li>
+ <li><em><strong><a href="safecode/">
+ SAFECode</a></strong>:</em> SAFECode is a
+ compiler-based system for enforcing program
+ safety. SAFECode uses LLVM as its code
+ representation.</li>
+ <li><em><strong>Macroscopic data structure
+ analysis and transformations</strong>:</em>
+ Analyzing and optimizing entire linked
+ data structures, based on two supporting techniques:
+ <em>Data Structure Analysis (DSA)</em> and
+ <em>Automatic Pool Allocation</em>.
+ DSA gives compilers extensive
+ static information about the structure, instances,
+ and lifetime of entire logical data structures.
+ Pool Allocation gives compilers detailed control over
+ the layout of such data structures in the heap.
+ <em>The DSA pass is included in Release 1.0</em>.
+ </li>
+ <li><em><strong>Runtime optimization on
+ general-purpose processors</strong>:</em>
+ We are developing techniques for optimizing ordinary
+ at runtime, by exploiting the LLVM instruction
+ set and compiler architecture in ways that would not
+ be possible with ordinary static compilation.
+ Our tracing and optimization strategy are described
+ in the section titled <em><a href="#subprojects">
+ Current Development</a></em>.
+ </li>
</td>
</tr>
</table>
</td>
<!-- Dividing bar between columns --><!-- <TD background="img/dot.gif" width=1></TD> --> <TD width=1></TD> <!-- Start of the right bar... 359 --> <td valign="top" width="48%"><table border="0"
cellpadding="0" cellspacing="8">
+
+ <tr>
+ <td align="center" background="img/sidebars.gif"
+ height="34"><a name="Releases"></a><font
+ color="#000000" size="5"><b>Public LLVM Release!</b></font> </td>
+ </tr>
+ <tr>
+ <td>
+ The current version of LLVM is 1.0 is now <a
+ href="releases/"><b>available for download</b></a>! LLVM is
+ publically available under the <a
+ href="http://www.opensource.org/licenses/UoI-NCSA.php">University
+ of Illinois Open-Source License</a>.<br><p><p></td>
+ </tr>
+
<tr>
<td align="center" background="img/sidebars.gif"
height="34"><a name="News"></a><font
@@ -367,20 +423,6 @@
optimization system that operates on LLVM traces at runtime,
using the software tracing mechanism and trace cache above.
</li>
- </td>
- </tr>
- <tr>
- <td>
- Other research projects in our group based on LLVM include:
- <li><em><strong><a href="safecode/">SAFECode</a></strong>:</em>
- SAFECode is a compiler-based system for enforcing program
- safety. SAFECode uses a type-safe subset of LLVM as its code
- representation.
- </li>
- <li><em><strong>Virtual Processor Architectures</strong>:</em>
- Using a virtual instruction set (such as a variant of LLVM) to
- hide hardware processor architectures (or architectural
- components) from user-level code.</li> </ul><p>
</td>
</tr>
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