[llvm-commits] CVS: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp

[Brian Gaeke]

Changes in directory reopt/lib/LightWtProfiling:

UnpackTraceFunction.cpp updated: 1.3 -> 1.4

---
Log message:

Share struct AllocInfo with the SPARC register allocator.
Rename insertCopy to insertCopyMachineInstrs, and update its comment.
Add stub for a new function called insertBranchMachineInstrs.
Add pseudocode for getRegisterAllocatedForValue.
Change the type of containsReturnInstruction, and update its comment.
Update insertLiveVariableCopies() to reflect the above.


---
Diffs of the changes:  (+38 -25)

Index: reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp
diff -u reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.3 reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.4
--- reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp:1.3	Sat Oct 18 01:30:37 2003
+++ reopt/lib/LightWtProfiling/UnpackTraceFunction.cpp	Thu Oct 23 18:26:20 2003
@@ -6,6 +6,7 @@
 //
 //===-----------------------------------------------------------------------===//
 
+#include "../../../../lib/CodeGen/RegAlloc/AllocInfo.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
@@ -15,18 +16,20 @@
 // FIXME: following decl should be shared with TraceToFunction.cpp in a header
 typedef std::set<Value *> LiveVariableSet;
 
-struct AllocInfo {
-  // FIXME: this should be the same as what you see in PhyRegAlloc.cpp
-  // but with equality/inequality operators defined appropriately.
-  bool operator== (const AllocInfo &X) const { return false; /* FIXME */ } 
-  bool operator!= (const AllocInfo &X) const { return !(*this == X);  } 
-};
-
-/// Insert a machine instruction for the current architecture, that
+/// Insert (a) machine instruction(s) for the current architecture, that
 /// copies the value in Source to the location specified by Target, at
 /// the beginning of B.
 ///
-void insertCopy (AllocInfo &Source, AllocInfo &Target, MachineBasicBlock &B) {
+void insertCopyMachineInstrs (AllocInfo &Source, AllocInfo &Target,
+                              MachineBasicBlock &B) {
+  // FIXME: not yet implemented
+}
+
+/// Emit the same sequence of MachineInstrs that
+/// replaceMachineCodeForFunction() would emit, to branch from the end
+/// of B to TargetAddr.
+///
+void insertBranchMachineInstrs (void *TargetAddr, MachineBasicBlock &B) {
   // FIXME: not yet implemented
 }
 
@@ -35,15 +38,29 @@
 ///
 AllocInfo getRegisterAllocatedForValue (Function *F, Value *V) {
   AllocInfo AI;
-  // FIXME: not yet implemented
+#ifdef PSEUDOCODE
+  assert (F has been code-generated);
+  if (F was compiled by llc) {
+    get the saved PhyRegAlloc state for F out of the Module of F;
+  } else {
+    PhyRegAlloc must have put the saved state for F somewhere where we can
+      get at it here;
+  }
+  get the AllocInfo for V from the saved PhyRegAlloc state for F;
+#endif
   return AI;
 }
 
 /// Returns a pointer to the return instruction in B, if B contains one,
-/// or null otherwise.
+/// or null otherwise. FIXME: SPARC target-specific.
 ///
-MachineInstr *containsReturnInstruction (MachineBasicBlock &B) {
-  // FIXME: not yet implemented
+const MachineInstr *containsReturnInstruction (MachineBasicBlock &B) {
+  for (MachineBasicBlock::const_reverse_iterator i = B.rbegin (),
+         e = B.rend (); i != e; ++i) {
+    const MachineInstr *MI = *i;
+    if (MI->getOpcode () == /* SparcV9::JMPLRETi */)
+      return MI;
+  }
   return 0;
 }
 
@@ -71,7 +88,12 @@
   // Modify EXIT MachineBasicBlocks of MF
   for (MachineFunction::iterator I = MF.begin (), E = MF.end (); I != E; ++I) {
     MachineBasicBlock &B = *I;
-    if (MachineInstr *RI = containsReturnInstruction (B)) {
+    if (const MachineInstr *RI = containsReturnInstruction (B)) {
+      void *ReturnAddress; 
+#ifdef PSEUDOCODE
+      Let ReturnAddress be the address in memory of the compiled code
+        for the MachineBasicBlock in MatrixF that RI would have returned to;
+#endif
       // Erase the contents of B
       while (!B.empty ()) {
         MachineBasicBlock::iterator MBBI = B.begin ();
@@ -85,18 +107,9 @@
         AllocInfo Source = getRegisterAllocatedForValue (TraceF, V);
         AllocInfo Target = getRegisterAllocatedForValue (MatrixF, V);
         if (Source != Target)
-          insertCopy (Source, Target, B);
-      }
-#ifdef PSEUDOCODE
-      Let RBB be the address in memory of the MachineBasicBlock in MatrixF
-        that RI would have returned to;
-      if (RBB is within the range of a Branch Always) {
-        Create a new "Branch Always" MachineInstr MI, which branches to RBB;
-        Insert MI at the end of the MachineBasicBlock B;
-      } else {
-        Use nifty "insert far call" code in SparcV9CodeEmitter;
+          insertCopyMachineInstrs (Source, Target, B);
       }
-#endif
+      insertBranchMachineInstrs (ReturnAddress, B);
     }
   }
 }