[llvm-commits] CVS: llvm/lib/Target/Sparc/MappingInfo.cpp SparcRegClassInfo.cpp SparcRegInfo.cpp SparcV9CodeEmitter.cpp
Misha Brukman
brukman at cs.uiuc.edu
Fri Oct 10 12:48:01 PDT 2003
Changes in directory llvm/lib/Target/Sparc:
MappingInfo.cpp updated: 1.12 -> 1.13
SparcRegClassInfo.cpp updated: 1.29 -> 1.30
SparcRegInfo.cpp updated: 1.110 -> 1.111
SparcV9CodeEmitter.cpp updated: 1.33 -> 1.34
---
Log message:
Fix spelling.
---
Diffs of the changes: (+12 -11)
Index: llvm/lib/Target/Sparc/MappingInfo.cpp
diff -u llvm/lib/Target/Sparc/MappingInfo.cpp:1.12 llvm/lib/Target/Sparc/MappingInfo.cpp:1.13
--- llvm/lib/Target/Sparc/MappingInfo.cpp:1.12 Thu Sep 18 12:37:25 2003
+++ llvm/lib/Target/Sparc/MappingInfo.cpp Fri Oct 10 12:47:23 2003
@@ -132,7 +132,7 @@
/// Function. MachineBasicBlocks are numbered from begin() to end()
/// in the Function's corresponding MachineFunction. Each successive
/// MachineBasicBlock increments the numbering by the number of instructions
-/// it contains. The side-effect of this method is to fill in the paramete
+/// it contains. The side-effect of this method is to fill in the parameter
/// KEY with the mapping of MachineBasicBlocks to numbers. KEY
/// is keyed on MachineInstrs, so each MachineBasicBlock is represented
/// therein by its first MachineInstr.
Index: llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.29 llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.30
--- llvm/lib/Target/Sparc/SparcRegClassInfo.cpp:1.29 Tue Sep 23 12:28:11 2003
+++ llvm/lib/Target/Sparc/SparcRegClassInfo.cpp Fri Oct 10 12:47:23 2003
@@ -261,7 +261,7 @@
return;
} else {
- // if we didn't find a color becuase the LR was single precision or
+ // if we didn't find a color because the LR was single precision or
// all f32-f63 range is filled, we try to allocate a register from
// the f0 - f31 region
@@ -292,7 +292,7 @@
}
if (ColorFound >= 0) {
- LR->setColor(ColorFound); // first color found in prefered order
+ LR->setColor(ColorFound); // first color found in preferred order
LR->markForSaveAcrossCalls();
} else {
// we are here because no color could be found
Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.110 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.111
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.110 Mon Sep 1 15:17:13 2003
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp Fri Oct 10 12:47:23 2003
@@ -466,7 +466,7 @@
}
else {
- // Now the arg is coming on stack. Since the LR recieved a register,
+ // Now the arg is coming on stack. Since the LR received a register,
// we just have to load the arg on stack into that register
//
const TargetFrameInfo& frameInfo = target.getFrameInfo();
@@ -522,7 +522,7 @@
else {
// Now the arg is coming on stack. Since the LR did NOT
- // recieved a register as well, it is allocated a stack position. We
+ // received a register as well, it is allocated a stack position. We
// can simply change the stack position of the LR. We can do this,
// since this method is called before any other method that makes
// uses of the stack pos of the LR (e.g., updateMachineInstr)
Index: llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp
diff -u llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.33 llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.34
--- llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.33 Tue Sep 30 12:49:41 2003
+++ llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp Fri Oct 10 12:47:23 2003
@@ -366,10 +366,11 @@
RestoreRegisters(DoubleFP, FSR, FPRS, CCR);
- // Change the return address to reexecute the restore, then the jump. However,
- // we can't just modify %i7 here, because we return to the function that will
- // restore the floating-point registers for us. Thus, we just return the value
- // we want it to be, and the parent will take care of setting %i7 correctly.
+ // Change the return address to re-execute the restore, then the jump.
+ // However, we can't just modify %i7 here, because we return to the function
+ // that will restore the floating-point registers for us. Thus, we just return
+ // the value we want it to be, and the parent will take care of setting %i7
+ // correctly.
DEBUG(std::cerr << "Callback returning to: 0x"
<< std::hex << (CameFrom-Offset-12) << "\n");
#if defined(sparc) || defined(__sparc__) || defined(__sparcv9)
@@ -482,7 +483,7 @@
// only numbered 0-31, hence can already fit into 5 bits (and 6)
DEBUG(std::cerr << "FP single reg, returning: " << fakeReg << "\n");
} else if (regType == UltraSparcRegInfo::FPDoubleRegType) {
- // FIXME: This assumes that we only have 5-bit register fiels!
+ // FIXME: This assumes that we only have 5-bit register fields!
// From Sparc Manual, page 40.
// The bit layout becomes: b[4], b[3], b[2], b[1], b[5]
fakeReg |= (fakeReg >> 5) & 1;
@@ -624,7 +625,7 @@
int64_t CallInstTarget = (rv - CurrPC) >> 2;
if (CallInstTarget >= (1<<29) || CallInstTarget <= -(1<<29)) {
DEBUG(std::cerr << "Making far call!\n");
- // addresss is out of bounds for the 30-bit call,
+ // address is out of bounds for the 30-bit call,
// make an indirect jump-and-link
emitFarCall(rv);
// this invalidates the instruction so that the call with an incorrect
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