[llvm-commits] CVS: llvm/utils/TableGen/InstrSelectorEmitter.cpp
Chris Lattner
lattner at cs.uiuc.edu
Tue Aug 12 00:20:01 PDT 2003
Changes in directory llvm/utils/TableGen:
InstrSelectorEmitter.cpp updated: 1.30 -> 1.31
---
Log message:
Fix emission of instructions that directly reference MBBs
---
Diffs of the changes:
Index: llvm/utils/TableGen/InstrSelectorEmitter.cpp
diff -u llvm/utils/TableGen/InstrSelectorEmitter.cpp:1.30 llvm/utils/TableGen/InstrSelectorEmitter.cpp:1.31
--- llvm/utils/TableGen/InstrSelectorEmitter.cpp:1.30 Mon Aug 11 23:56:42 2003
+++ llvm/utils/TableGen/InstrSelectorEmitter.cpp Tue Aug 12 00:19:49 2003
@@ -1205,15 +1205,21 @@
if (P->getResult()) OS << ", NewReg";
OS << ")";
- for (unsigned i = 0, e = Operands.size(); i != e; ++i)
- if (Operands[i].first->isLeaf()) {
- Record *RV = Operands[i].first->getValueRecord();
+ for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
+ TreePatternNode *Op = Operands[i].first;
+ if (Op->isLeaf()) {
+ Record *RV = Op->getValueRecord();
assert(RV->isSubClassOf("RegisterClass") &&
"Only handles registers here so far!");
OS << ".addReg(" << Operands[i].second << "->Val)";
- } else {
+ } else if (Op->getOperator()->getName() == "imm") {
OS << ".addZImm(" << Operands[i].second << "->Val)";
+ } else if (Op->getOperator()->getName() == "basicblock") {
+ OS << ".addMBB(" << Operands[i].second << "->Val)";
+ } else {
+ assert(0 && "Unknown value type!");
}
+ }
OS << ";\n";
break;
case Pattern::Expander: {
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