[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcV9_Reg.td

[Chris Lattner]

Changes in directory llvm/lib/Target/Sparc:

SparcV9_Reg.td updated: 1.1 -> 1.2

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Log message:

Specify the value type for the register, not just the size.


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Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcV9_Reg.td
diff -u llvm/lib/Target/Sparc/SparcV9_Reg.td:1.1 llvm/lib/Target/Sparc/SparcV9_Reg.td:1.2
--- llvm/lib/Target/Sparc/SparcV9_Reg.td:1.1	Wed May 28 22:31:43 2003
+++ llvm/lib/Target/Sparc/SparcV9_Reg.td	Sun Jul 27 23:25:36 2003
@@ -9,7 +9,10 @@
 class V9Reg : Register { set Namespace = "SparcV9"; }
 
 // Ri - One of the 32 64 bit integer registers
-class Ri<bits<5> num> : V9Reg { set Size = 64; field bits<5> Num = num; }
+class Ri<bits<5> num> : V9Reg {
+  set RegType = i64;              // All integer registers are 64 bits in size
+  field bits<5> Num = num;        // Numbers are identified with a 5 bit ID
+}
 
 def G0 : Ri< 0>;    def G1 : Ri< 1>;    def G2 : Ri< 2>;    def G3 : Ri< 3>;
 def G4 : Ri< 4>;    def G5 : Ri< 5>;    def G6 : Ri< 6>;    def G7 : Ri< 7>;