[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp SparcV9CodeEmitter.h

[Misha Brukman]

Changes in directory llvm/lib/Target/Sparc:

SparcV9CodeEmitter.cpp updated: 1.20 -> 1.21
SparcV9CodeEmitter.h updated: 1.10 -> 1.11

---
Log message:

Fixed the number translation scheme for the integer condition code registers: it
now works in instructions which require a 2-bit or 3-bit INTcc code.

Incidentally, that means that the representation of INTcc registers is now the
same in both integer and FP instructions. Thus, code became much simpler and
cleaner.


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp
diff -u llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.20 llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.21
--- llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.20	Tue Jul 15 14:09:00 2003
+++ llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp	Wed Jul 16 15:30:40 2003
@@ -327,22 +327,6 @@
   }
 }
 
-bool SparcV9CodeEmitter::isFPInstr(MachineInstr &MI) {
-  for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) {
-    const MachineOperand &MO = MI.getOperand(i);
-    if (MO.isPhysicalRegister()) {
-      unsigned fakeReg = MO.getReg(), realReg, regClass, regType;
-      regType = TM.getRegInfo().getRegType(fakeReg);
-      // At least map fakeReg into its class
-      // fakeReg = TM.getRegInfo().getClassRegNum(fakeReg, regClass);
-      if (regType == UltraSparcRegInfo::FPSingleRegType ||
-          regType == UltraSparcRegInfo::FPDoubleRegType)
-        return true;
-    }
-  }
-  return false;
-}
-
 unsigned 
 SparcV9CodeEmitter::getRealRegNum(unsigned fakeReg,
                                          MachineInstr &MI) {
@@ -386,21 +370,13 @@
     return fakeReg;
   }
   case UltraSparcRegInfo::IntCCRegClassID: {
-    /*                                           xcc, icc, ccr */
-    static const unsigned FPInstrIntCCReg[]  = {  6,   4,   2 };
-    static const unsigned IntInstrIntCCReg[] = {  2,   0,   2 };
+    /*                                   xcc, icc, ccr */
+    static const unsigned IntCCReg[] = {  6,   4,   2 };
     
-    if (isFPInstr(MI)) {
-      assert(fakeReg < sizeof(FPInstrIntCCReg)/sizeof(FPInstrIntCCReg[0])
-             && "FP CC register out of bounds for FPInstr IntCCReg map");      
-      DEBUG(std::cerr << "FP instr, IntCC reg: " << FPInstrIntCCReg[fakeReg] << "\n");
-      return FPInstrIntCCReg[fakeReg];
-    } else {
-      assert(fakeReg < sizeof(IntInstrIntCCReg)/sizeof(IntInstrIntCCReg[0])
-             && "Int CC register out of bounds for IntInstr IntCCReg map");
-      DEBUG(std::cerr << "FP instr, IntCC reg: " << IntInstrIntCCReg[fakeReg] << "\n");
-      return IntInstrIntCCReg[fakeReg];
-    }
+    assert(fakeReg < sizeof(IntCCReg)/sizeof(IntCCReg[0])
+             && "CC register out of bounds for IntCCReg map");      
+    DEBUG(std::cerr << "IntCC reg: " << IntCCReg[fakeReg] << "\n");
+    return IntCCReg[fakeReg];
   }
   case UltraSparcRegInfo::FloatCCRegClassID: {
     /* These are laid out %fcc0 - %fcc3 => 0 - 3, so are correct */
@@ -580,7 +556,8 @@
     unsigned fakeReg = MO.getAllocatedRegNum();
     unsigned realRegByClass = getRealRegNum(fakeReg, MI);
     DEBUG(std::cerr << MO << ": Reg[" << std::dec << fakeReg << "] => "
-                    << realRegByClass << "\n");
+                    << realRegByClass << " (LLC: " 
+                    << TM.getRegInfo().getUnifiedRegName(fakeReg) << ")\n");
     rv = realRegByClass;
   } else if (MO.isImmediate()) {
     rv = MO.getImmedValue();


Index: llvm/lib/Target/Sparc/SparcV9CodeEmitter.h
diff -u llvm/lib/Target/Sparc/SparcV9CodeEmitter.h:1.10 llvm/lib/Target/Sparc/SparcV9CodeEmitter.h:1.11
--- llvm/lib/Target/Sparc/SparcV9CodeEmitter.h:1.10	Tue Jul 15 14:09:43 2003
+++ llvm/lib/Target/Sparc/SparcV9CodeEmitter.h	Wed Jul 16 15:30:40 2003
@@ -47,7 +47,6 @@
   void emitBasicBlock(MachineBasicBlock &MBB);
   void* getGlobalAddress(GlobalValue *V, MachineInstr &MI,
                          bool isPCRelative);
-  bool isFPInstr(MachineInstr &MI);
   unsigned getRealRegNum(unsigned fakeReg, MachineInstr &MI);
   inline void emitFarCall(uint64_t Addr);