[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInternals.h

[Misha Brukman]

Changes in directory llvm/lib/Target/Sparc:

SparcInternals.h updated: 1.92 -> 1.93

---
Log message:

Moved RegClassIDs enum to be next to the RegTypes enum.


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.92 llvm/lib/Target/Sparc/SparcInternals.h:1.93
--- llvm/lib/Target/Sparc/SparcInternals.h:1.92	Sun Jul  6 14:53:59 2003
+++ llvm/lib/Target/Sparc/SparcInternals.h	Mon Jul  7 11:52:39 2003
@@ -249,20 +249,6 @@
 //----------------------------------------------------------------------------
 
 class UltraSparcRegInfo : public TargetRegInfo {
-public:
-  // The actual register classes in the Sparc
-  //
-  // **** WARNING: If this enum order is changed, also modify 
-  // getRegisterClassOfValue method below since it assumes this particular 
-  // order for efficiency.
-  // 
-  enum RegClassIDs { 
-    IntRegClassID,                      // Integer
-    FloatRegClassID,                    // Float (both single/double)
-    IntCCRegClassID,                    // Int Condition Code
-    FloatCCRegClassID,                  // Float Condition code
-    SpecialRegClassID                   // Special (unallocated) registers
-  };
 
 private:
 
@@ -326,6 +312,20 @@
     IntCCRegType,
     FloatCCRegType,
     SpecialRegType
+  };
+
+  // The actual register classes in the Sparc
+  //
+  // **** WARNING: If this enum order is changed, also modify 
+  // getRegisterClassOfValue method below since it assumes this particular 
+  // order for efficiency.
+  // 
+  enum RegClassIDs { 
+    IntRegClassID,                      // Integer
+    FloatRegClassID,                    // Float (both single/double)
+    IntCCRegClassID,                    // Int Condition Code
+    FloatCCRegClassID,                  // Float Condition code
+    SpecialRegClassID                   // Special (unallocated) registers
   };
 
   UltraSparcRegInfo(const UltraSparc &tgt);