[llvm-commits] CVS: llvm/include/llvm/Reoptimizer/BinInterface/sparc9.h
Joel Stanley
jstanley at cs.uiuc.edu
Mon Jun 23 17:45:01 PDT 2003
Changes in directory llvm/include/llvm/Reoptimizer/BinInterface:
sparc9.h updated: 1.14 -> 1.15
---
Log message:
---
Diffs of the changes:
Index: llvm/include/llvm/Reoptimizer/BinInterface/sparc9.h
diff -u llvm/include/llvm/Reoptimizer/BinInterface/sparc9.h:1.14 llvm/include/llvm/Reoptimizer/BinInterface/sparc9.h:1.15
--- llvm/include/llvm/Reoptimizer/BinInterface/sparc9.h:1.14 Sat May 31 17:16:52 2003
+++ llvm/include/llvm/Reoptimizer/BinInterface/sparc9.h Mon Jun 23 17:44:25 2003
@@ -430,12 +430,111 @@
MK_FLD(INSTR_I, 1) | \
MK_FLD(INSTR_OP3, OP3_ADD))
-#define MK_INSTR_BRANCH_RS1(cond) \
+#define MK_INSTR_BRANCH_RS1(cond) \
(MK_FLD(INSTR_OP, OP_BRANCH) | \
MK_FLD(INSTR_BPR, BPR) | \
MK_FLD(INSTR_BPR_COND, cond))
#define MK_INSTR_BRANCH_NO_RS1(cond) \
(MK_FLD(INSTR_OP, OP_BRANCH) | \
- MK_FLD(INSTR_INT_BR, Bicc) | \
+ MK_FLD(INSTR_INT_BR, Bicc) | \
MK_FLD(INSTR_INTBR_COND, cond))
+
+// Add a register to a register
+
+#define MK_ADD_R_R(dreg, sreg1, sreg2) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP3, OP3_ADD) | \
+ MK_FLD(INSTR_RS1, sreg1) | \
+ MK_FLD(INSTR_I, 0) | \
+ MK_FLD(INSTR_RS2, sreg2))
+
+// Construct immediate-valued logical operation
+
+#define MK_LOGIC_IMM(op3, dreg, sreg, imm) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_RS1, sreg) | \
+ MK_FLD(INSTR_SIMM13, imm) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_OP3, op3))
+
+// Construct reg-to-reg logical operation
+
+#define MK_LOGIC(op3, dreg, sreg1, sreg2) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_RS1, sreg1) | \
+ MK_FLD(INSTR_RS2, sreg2) | \
+ MK_FLD(INSTR_I, 0) | \
+ MK_FLD(INSTR_OP3, op3))
+
+// Construct sethi instruction
+
+#define MK_SETHI(dreg, imm) \
+ (MK_FLD(INSTR_OP, OP_BRANCH) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP2, OP2_SETHI) | \
+ MK_FLD(INSTR_IMM22, imm))
+
+// Construct S{LL,RL,RA}X shift instruction.
+
+#define MK_SHIFTX(op3, dreg, sreg, shcnt) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP3, op3) | \
+ MK_FLD(INSTR_RS1, sreg) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_X, 1) | \
+ MK_FLD(INSTR_SHCNT64, shcnt))
+
+#define MK_STORE_IMM(srcreg, basereg, offset) \
+ (MK_FLD(INSTR_OP, OP_3) | \
+ MK_FLD(INSTR_RD, srcreg) | \
+ MK_FLD(INSTR_OP3, OP3_STX) | \
+ MK_FLD(INSTR_RS1, basereg) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_SIMM13, offset))
+
+#define MK_LOAD_IMM(destreg, basereg, offset) \
+ (MK_FLD(INSTR_OP, OP_3) | \
+ MK_FLD(INSTR_RD, destreg) | \
+ MK_FLD(INSTR_OP3, OP3_LDX) | \
+ MK_FLD(INSTR_RS1, basereg) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_SIMM13, offset))
+
+// Construct save instruction
+
+#define MK_SAVE_IMM(dreg, sreg, imm) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP3, OP3_SAVE) | \
+ MK_FLD(INSTR_RS1, sreg) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_SIMM13, imm))
+
+#define MK_SAVE_REG(dreg, sreg1, sreg2) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP3, OP3_SAVE) | \
+ MK_FLD(INSTR_RS1, sreg1) | \
+ MK_FLD(INSTR_I, 0) | \
+ MK_FLD(INSTR_RS2, sreg2))
+
+#define MK_RESTORE_IMM(dreg, sreg, imm) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP3, OP3_RESTORE) | \
+ MK_FLD(INSTR_RS1, sreg) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_SIMM13, imm))
+
+#define MK_JMPL_INDIRECT(dreg, sreg, imm) \
+ (MK_FLD(INSTR_OP, OP_2) | \
+ MK_FLD(INSTR_RD, dreg) | \
+ MK_FLD(INSTR_OP3, OP3_JMPL) | \
+ MK_FLD(INSTR_RS1, sreg) | \
+ MK_FLD(INSTR_I, 1) | \
+ MK_FLD(INSTR_SIMM13, imm))
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