[llvm-commits] CVS: llvm/lib/Reoptimizer/Trigger/Trigger.cpp
Anand Shukla
ashukla at cs.uiuc.edu
Thu Jun 5 01:05:01 PDT 2003
Changes in directory llvm/lib/Reoptimizer/Trigger:
Trigger.cpp updated: 1.17 -> 1.18
---
Log message:
Put in check so that it avoids forming traces with calls
---
Diffs of the changes:
Index: llvm/lib/Reoptimizer/Trigger/Trigger.cpp
diff -u llvm/lib/Reoptimizer/Trigger/Trigger.cpp:1.17 llvm/lib/Reoptimizer/Trigger/Trigger.cpp:1.18
--- llvm/lib/Reoptimizer/Trigger/Trigger.cpp:1.17 Sat May 31 21:35:01 2003
+++ llvm/lib/Reoptimizer/Trigger/Trigger.cpp Thu Jun 5 01:04:35 2003
@@ -77,11 +77,20 @@
std::vector<BasicBlock *> vBB; //trace of BBs
getBBtrace(vBB, pn, funcList[mn]);//, instToErase);
+#ifdef FOR_DEBUG
+ printTrace(vBB, pn);
+#endif
+
if(!isWellFormedLoop(vBB, funcList[mn])){
cnt[pn] = -99999999;
return;
}
-
+
+ if(hasCall(vBB)){
+ cnt[pn] = -99999999;
+ return;
+ }
+
std::pair<uint64_t, uint64_t> firstBBLimits =
getBasicBlockInfo(*(vBB.begin()));
@@ -94,12 +103,12 @@
cnt[pn] = -9999999;
return;
}
- /*
+
if(isThrashing(tr, startAddr)){
cnt[pn] = -9999999;
return;
}
- */
+
cnt[pn] = -9999999;
@@ -151,9 +160,9 @@
uint64_t bbStart = bbInst.first;
uint64_t bbEnd = bbInst.second;
-#ifdef FOR_DEBUG
+ //#ifdef FOR_DEBUG
std::cerr<<"Start: "<<bbStart<<"\t End: "<<bbEnd<<"\n";
-#endif
+ //#endif
//get the instructions until which to insert
uint64_t startBB = bbStart;
@@ -234,10 +243,12 @@
&& "Incorrect trace");
//later change this to BA
- cidToTop = cid + instIndex-1;
+ //cidToTop = cid + instIndex;//-1;
unsigned int dscid = bin.insert(SECTION_TRACE,
(uint *)(intptr_t)(addr+4),
(uint *)(intptr_t)(addr+8));
+ cidToTop = dscid;
+
if(unrollCount == 1 && !bbToCid[*VBI]){
bbToCid[*VBI] = dscid;
bbToSec[*VBI] = secId;
@@ -268,8 +279,11 @@
if(flags_br & IF_R_RS1){
unsigned int flags_ds = sparc_analyze(ds);
if(flags_ds & IF_W_RD){
- assert(((RD_FLD(ds, INSTR_RD)) !=(RD_FLD(br, INSTR_RS1)))
- && "Can not move delay slot above branch!");
+ if((RD_FLD(ds, INSTR_RD)) == (RD_FLD(br, INSTR_RS1))){
+ return;
+ }
+ //assert(((RD_FLD(ds, INSTR_RD)) !=(RD_FLD(br, INSTR_RS1)))
+ // && "Can not move delay slot above branch!");
}
}
@@ -307,8 +321,11 @@
if(flags_br & IF_R_RS1){
unsigned int flags_ds = sparc_analyze(ds);
if(flags_ds & IF_W_RD){
- assert(((RD_FLD(ds, INSTR_RD)) !=(RD_FLD(br, INSTR_RS1)))
- && "Can not move delay slot above branch!");
+ if((RD_FLD(ds, INSTR_RD)) == (RD_FLD(br, INSTR_RS1))){
+ return;
+ }
+ //assert(((RD_FLD(ds, INSTR_RD)) !=(RD_FLD(br, INSTR_RS1)))
+ // && "Can not move delay slot above branch!");
}
}
@@ -343,10 +360,13 @@
getBasicBlockInfo(BI->getSuccessor(1)).first == startAddr
&& "Incorrect trace");
- cidToTop = cid + instIndex-1;
+ //cidToTop = cid + instIndex-1;
unsigned int dscid = bin.insert(SECTION_TRACE,
(uint *)(intptr_t)(addr+4),
(uint *)(intptr_t)(addr+8));
+
+ cidToTop = dscid;
+
if(unrollCount == 1 && !bbToCid[*VBI]){
bbToCid[*VBI] = dscid;
bbToSec[*VBI] = secId;
@@ -434,9 +454,9 @@
//std::cerr<<"Cid to to "<<cidToTop<<"\n";
unsigned nop = bin.newnop();
- bin.move(nop, cidToTop);
- bin.move(newBr, nop);
-
+ bin.move(newBr, cidToTop);
+ bin.move(nop, newBr);
+
bin.reduce();
//mark instructions as pinned
@@ -460,13 +480,13 @@
optimizationPasses(funcList[mn], vBB, ltrace, bin, secId, cidOffset);
-#ifdef FOR_DEBUG
+ //#ifdef FOR_DEBUG
for(unsigned int i = 0; i < 2+(secId-2)*UNROLL_FACTOR; i++){
std::cerr<<"------------SECTION "<<i<<"\n";
bin.print(i);
}
std::cerr<<"-------------------------\n";
-#endif
+ //#endif
uint64_t addrToOutput;
@@ -476,7 +496,7 @@
bin.emit((unsigned char *)(intptr_t)addrToOutput);
doFlush(addrToOutput-4, addrToOutput+bin.predict()/4);
-#ifdef FOR_DEBUG
+ //#ifdef FOR_DEBUG
std::cerr<<"-----------\n";
-#endif
+ //#endif
}
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