[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcV9_F3.td

[Misha Brukman]

Changes in directory llvm/lib/Target/Sparc:

SparcV9_F3.td updated: 1.9 -> 1.10

---
Log message:

F3_2rd instructions were missing an 'rd' field.


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Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcV9_F3.td
diff -u llvm/lib/Target/Sparc/SparcV9_F3.td:1.9 llvm/lib/Target/Sparc/SparcV9_F3.td:1.10
--- llvm/lib/Target/Sparc/SparcV9_F3.td:1.9	Tue Jun  3 21:26:14 2003
+++ llvm/lib/Target/Sparc/SparcV9_F3.td	Wed Jun  4 19:39:45 2003
@@ -75,14 +75,13 @@
 }
 
 // F3_rdrs1simm13 - Common class of instructions that have rd, rs1, and simm13
-class F3_rdrs1simm13 : F3_rd {
+class F3_rdrs1simm13 : F3_rdrs1 {
   bits<13> simm13;
   set Inst{12-0} = simm13;
 }
 
-
 // F3_rdrs1rs2 - Common class of instructions that have rd, rs1, and rs2 fields
-class F3_rdrs1rs2 : F3_rs1 {
+class F3_rdrs1rs2 : F3_rdrs1 {
   bits<5> rs2;
   set Inst{4-0} = rs2;
 }