[llvm-commits] CVS: llvm/include/llvm/Target/TargetCacheInfo.h TargetMachine.h TargetOptInfo.h TargetRegInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

TargetCacheInfo.h updated: 1.7 -> 1.8
TargetMachine.h updated: 1.30 -> 1.31
TargetOptInfo.h updated: 1.2 -> 1.3
TargetRegInfo.h updated: 1.36 -> 1.37

---
Log message:

Remove noncopyableV base classes, as they were confusing the doxygen documentation,
making it harder to read.


---
Diffs of the changes:

Index: llvm/include/llvm/Target/TargetCacheInfo.h
diff -u llvm/include/llvm/Target/TargetCacheInfo.h:1.7 llvm/include/llvm/Target/TargetCacheInfo.h:1.8
--- llvm/include/llvm/Target/TargetCacheInfo.h:1.7	Sat Dec 28 20:50:25 2002
+++ llvm/include/llvm/Target/TargetCacheInfo.h	Tue Jun  3 10:28:40 2003
@@ -10,8 +10,10 @@
 #include "Support/DataTypes.h"
 class TargetMachine;
 
-struct TargetCacheInfo : public NonCopyableV {
+struct TargetCacheInfo {
   const TargetMachine ⌖
+  TargetCacheInfo(const TargetCacheInfo&); // DO NOT IMPLEMENT
+  void operator=(const TargetCacheInfo&);  // DO NOT IMPLEMENT
 protected:
   unsigned int           numLevels;
   std::vector<unsigned short> cacheLineSizes;
@@ -22,6 +24,7 @@
   TargetCacheInfo(const TargetMachine& tgt) : target(tgt) {
     Initialize();
   }
+  virtual ~TargetCacheInfo() {}
   
   // Default parameters are:
   //    NumLevels    = 2


Index: llvm/include/llvm/Target/TargetMachine.h
diff -u llvm/include/llvm/Target/TargetMachine.h:1.30 llvm/include/llvm/Target/TargetMachine.h:1.31
--- llvm/include/llvm/Target/TargetMachine.h:1.30	Sat Apr 26 15:10:54 2003
+++ llvm/include/llvm/Target/TargetMachine.h	Tue Jun  3 10:28:40 2003
@@ -28,10 +28,12 @@
 /// the target machine.  All target-specific information should be accessible
 /// through this interface.
 /// 
-class TargetMachine : public NonCopyableV {
+class TargetMachine {
   const std::string Name;
-  const TargetData DataLayout;		// Calculates type size & alignment
+  const TargetData DataLayout;		 // Calculates type size & alignment
   
+  TargetMachine(const TargetMachine&);   // DO NOT IMPLEMENT
+  void operator=(const TargetMachine&);  // DO NOT IMPLEMENT
 protected:
   TargetMachine(const std::string &name, // Can only create subclasses...
 		bool LittleEndian = false,


Index: llvm/include/llvm/Target/TargetOptInfo.h
diff -u llvm/include/llvm/Target/TargetOptInfo.h:1.2 llvm/include/llvm/Target/TargetOptInfo.h:1.3
--- llvm/include/llvm/Target/TargetOptInfo.h:1.2	Sat Dec 28 20:50:25 2002
+++ llvm/include/llvm/Target/TargetOptInfo.h	Tue Jun  3 10:28:40 2003
@@ -1,21 +1,24 @@
 //===-- llvm/Target/TargetOptInfo.h ------------------------------*- C++ -*-==//
 //
+//  FIXME: ADD A COMMENT DESCRIBING THIS FILE!
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TARGET_TARGETOPTINFO_H
 #define LLVM_TARGET_TARGETOPTINFO_H
 
-#include "Support/DataTypes.h"
+class MachineInstr;
 class TargetMachine;
 
-struct TargetOptInfo : public NonCopyableV {
+struct TargetOptInfo {
   const TargetMachine ⌖
   
+  TargetOptInfo(const TargetOptInfo &);   // DO NOT IMPLEMENT
+  void operator=(const TargetOptInfo &);  // DO NOT IMPLEMENT
 public:
-  TargetOptInfo(const TargetMachine& tgt): target(tgt) { }
+  TargetOptInfo(const TargetMachine &TM) : target(TM) { }
 
-  virtual bool IsUselessCopy    (const MachineInstr* MI) const = 0;
+  virtual bool IsUselessCopy(const MachineInstr* MI) const = 0;
 };
 
 #endif


Index: llvm/include/llvm/Target/TargetRegInfo.h
diff -u llvm/include/llvm/Target/TargetRegInfo.h:1.36 llvm/include/llvm/Target/TargetRegInfo.h:1.37
--- llvm/include/llvm/Target/TargetRegInfo.h:1.36	Sat May 31 02:44:07 2003
+++ llvm/include/llvm/Target/TargetRegInfo.h	Tue Jun  3 10:28:40 2003
@@ -8,7 +8,6 @@
 #ifndef LLVM_TARGET_TARGETREGINFO_H
 #define LLVM_TARGET_TARGETREGINFO_H
 
-#include "Support/NonCopyable.h"
 #include "Support/hash_map"
 #include <string>
 
@@ -56,7 +55,9 @@
 //---------------------------------------------------------------------------
 /// TargetRegInfo - Interface to register info of target machine
 ///
-class TargetRegInfo : public NonCopyableV {
+class TargetRegInfo {
+  TargetRegInfo(const TargetRegInfo &);  // DO NOT IMPLEMENT
+  void operator=(const TargetRegInfo &); // DO NOT IMPLEMENT
 protected:
   // A vector of all machine register classes
   //
@@ -71,7 +72,7 @@
   static int getInvalidRegNum() { return -1; }
 
   TargetRegInfo(const TargetMachine& tgt) : target(tgt) { }
-  ~TargetRegInfo() {
+  virtual ~TargetRegInfo() {
     for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
       delete MachineRegClassArr[i];
   }