[llvm-commits] CVS: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp

[Misha Brukman]

Changes in directory llvm/lib/CodeGen/InstrSelection:

InstrSelectionSupport.cpp updated: 1.48 -> 1.49

---
Log message:

Moved code to modify the opcode from 'reg' to 'imm' form to a more logical place.


---
Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
diff -u llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.48 llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.49
--- llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp:1.48	Sat May 31 02:38:37 2003
+++ llvm/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp	Mon Jun  2 22:18:20 2003
@@ -186,12 +186,6 @@
                                       immedValue);
             if (opType == MachineOperand::MO_VirtualRegister)
               constantThatMustBeLoaded = true;
-            else {
-              // The optype has changed from being a register to an immediate
-              // This means we need to change the opcode, e.g. ADDr -> ADDi
-              unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
-              minstr->setOpcode(newOpcode);
-            }
           }
         }
       else
@@ -219,21 +213,18 @@
                 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
                 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
             }
-          else 
-            {
-              // The optype has changed from being a register to an immediate
-              // This means we need to change the opcode, e.g. ADDr -> ADDi
-              unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
-              minstr->setOpcode(newOpcode);
-            }
         }
 
       if (opType == MachineOperand::MO_MachineRegister)
         minstr->SetMachineOperandReg(op, machineRegNum);
       else if (opType == MachineOperand::MO_SignExtendedImmed ||
-               opType == MachineOperand::MO_UnextendedImmed)
+               opType == MachineOperand::MO_UnextendedImmed) {
         minstr->SetMachineOperandConst(op, opType, immedValue);
-      else if (constantThatMustBeLoaded ||
+        // The optype has changed from being a register to an immediate
+        // This means we need to change the opcode, e.g. ADDr -> ADDi
+        unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
+        minstr->setOpcode(newOpcode);
+      } else if (constantThatMustBeLoaded ||
                (opValue && isa<GlobalValue>(opValue)))
         { // opValue is a constant that must be explicitly loaded into a reg
           assert(opValue);