[llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp

[Vikram Adve]

Changes in directory llvm/lib/CodeGen:

MachineInstr.cpp updated: 1.71 -> 1.72

---
Log message:

Allow explicit physical registers for implicit operands.


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Diffs of the changes:

Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.71 llvm/lib/CodeGen/MachineInstr.cpp:1.72
--- llvm/lib/CodeGen/MachineInstr.cpp:1.71	Mon May 26 19:05:17 2003
+++ llvm/lib/CodeGen/MachineInstr.cpp	Sat May 31 02:39:06 2003
@@ -23,6 +23,7 @@
 // Constructor for instructions with variable #operands
 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
   : opCode(OpCode),
+    opCodeFlags(0),
     operands(numOperands, MachineOperand()),
     numImplicitRefs(0)
 {
@@ -36,6 +37,7 @@
 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
                            bool XX, bool YY)
   : opCode(Opcode),
+    opCodeFlags(0),
     numImplicitRefs(0)
 {
   operands.reserve(numOperands);
@@ -47,6 +49,7 @@
 MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
                            unsigned numOperands)
   : opCode(Opcode),
+    opCodeFlags(0),
     numImplicitRefs(0)
 {
   assert(MBB && "Cannot use inserting ctor with null basic block!");
@@ -60,7 +63,7 @@
 {
   int NumOperands = TargetInstrDescriptors[opCode].numOperands;
   if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
-    return true;  // Broken!
+    return true;  // Broken: we have all the operands of this instruction!
   return false;
 }
 
@@ -138,6 +141,13 @@
 {
   assert(i < getNumOperands());          // must be explicit op
   operands[i].setRegForValue(regNum);
+  insertUsedReg(regNum);
+}
+
+void
+MachineInstr::SetRegForImplicitRef(unsigned i, int regNum)
+{
+  getImplicitOp(i).setRegForValue(regNum);
   insertUsedReg(regNum);
 }