[llvm-commits] CVS: llvm/include/llvm/Target/TargetRegInfo.h
Misha Brukman
brukman at cs.uiuc.edu
Thu May 29 00:01:01 PDT 2003
Changes in directory llvm/include/llvm/Target:
TargetRegInfo.h updated: 1.34 -> 1.35
---
Log message:
Fixed misspelling and broke a line that was wrapping.
---
Diffs of the changes:
Index: llvm/include/llvm/Target/TargetRegInfo.h
diff -u llvm/include/llvm/Target/TargetRegInfo.h:1.34 llvm/include/llvm/Target/TargetRegInfo.h:1.35
--- llvm/include/llvm/Target/TargetRegInfo.h:1.34 Mon May 26 19:07:13 2003
+++ llvm/include/llvm/Target/TargetRegInfo.h Thu May 29 00:00:14 2003
@@ -178,7 +178,7 @@
// a regId in a register class to a common Id, or vice versa,
// we use the folloing two methods.
//
- // Thsi method converts from class reg. number to unified register number.
+ // This method converts from class reg. number to unified register number.
int getUnifiedRegNum(unsigned regClassID, int reg) const {
if (reg == getInvalidRegNum()) { return getInvalidRegNum(); }
assert(regClassID < getNumOfRegClasses() && "Invalid register class");
@@ -195,7 +195,8 @@
int totalRegs = 0, rcid = 0, NC = getNumOfRegClasses();
while (rcid < NC &&
- uRegNum >= totalRegs + (int) MachineRegClassArr[rcid]->getNumOfAllRegs()) {
+ uRegNum>= totalRegs+(int)MachineRegClassArr[rcid]->getNumOfAllRegs())
+ {
totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs();
rcid++;
}
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