[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.h X86InstrInfo.cpp
Misha Brukman
brukman at cs.uiuc.edu
Fri May 23 20:09:01 PDT 2003
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.h updated: 1.22 -> 1.23
X86InstrInfo.cpp updated: 1.13 -> 1.14
---
Log message:
Reword to remove reference to how things worked in the past.
---
Diffs of the changes:
Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.22 llvm/lib/Target/X86/X86InstrInfo.h:1.23
--- llvm/lib/Target/X86/X86InstrInfo.h:1.22 Fri May 23 19:09:13 2003
+++ llvm/lib/Target/X86/X86InstrInfo.h Fri May 23 20:08:43 2003
@@ -154,10 +154,9 @@
///
MachineInstr* createNOPinstr() const;
- /// isNOPinstr - since we no longer have a special NOP opcode, we need to know
- /// if a given instruction is interpreted as an `official' NOP instr, i.e.,
- /// there may be more than one way to `do nothing' but only one canonical
- /// way to slack off.
+ /// isNOPinstr - not having a special NOP opcode, we need to know if a given
+ /// instruction is interpreted as an `official' NOP instr, i.e., there may be
+ /// more than one way to `do nothing' but only one canonical way to slack off.
///
bool isNOPinstr(const MachineInstr &MI) const;
Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.13 llvm/lib/Target/X86/X86InstrInfo.cpp:1.14
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.13 Fri May 23 19:09:13 2003
+++ llvm/lib/Target/X86/X86InstrInfo.cpp Fri May 23 20:08:43 2003
@@ -48,10 +48,9 @@
}
-// isNOPinstr - since we no longer have a special NOP opcode, we need to know
-// if a given instruction is interpreted as an `official' NOP instr, i.e.,
-// there may be more than one way to `do nothing' but only one canonical
-// way to slack off.
+/// isNOPinstr - not having a special NOP opcode, we need to know if a given
+/// instruction is interpreted as an `official' NOP instr, i.e., there may be
+/// more than one way to `do nothing' but only one canonical way to slack off.
//
bool X86InstrInfo::isNOPinstr(const MachineInstr &MI) const {
// Make sure the instruction is EXACTLY `xchg ax, ax'
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