[llvm-commits] CVS: llvm/lib/Reoptimizer/Inst/InstManip.cpp InstManip.h

[Joel Stanley]

Changes in directory llvm/lib/Reoptimizer/Inst:

InstManip.cpp updated: 1.2 -> 1.3
InstManip.h updated: 1.2 -> 1.3

---
Log message:

Now uses BinInterface macros for instruction-word generation.


---
Diffs of the changes:

Index: llvm/lib/Reoptimizer/Inst/InstManip.cpp
diff -u llvm/lib/Reoptimizer/Inst/InstManip.cpp:1.2 llvm/lib/Reoptimizer/Inst/InstManip.cpp:1.3
--- llvm/lib/Reoptimizer/Inst/InstManip.cpp:1.2	Thu Apr 10 00:35:02 2003
+++ llvm/lib/Reoptimizer/Inst/InstManip.cpp	Thu Apr 10 15:33:31 2003
@@ -42,18 +42,43 @@
                                std::vector<unsigned>& snippet,
                                TargetRegister reg) const
 {
-    // Using %o0 and %o1, load the 64-bit value 'value' into %o0.  The sequence of
-    // instructions to do this is placed in the provided instruction vector 'snippet'.
+    // When reg == REG_0, load the 64-bit value into %o0, using %o0 and %o1.
+    // When reg == REG_1, load the 64-bit value into %o1, using %o1 and %o2.
+    // The sequence of instructions is placed into the provided instruction vector.
 
     unsigned initSize = snippet.size();
+    unsigned destReg, tmpReg;
+    switch(reg) {
+        case REG_0:
+            destReg = R_O0;
+            tmpReg = R_O1;
+            break;
+        case REG_1:
+            destReg = R_O1;
+            tmpReg = R_O2;
+            break;
+        default:
+            assert(0 && "Invalid destination register");
+    }
     
-    snippet.push_back(0x11000000 | HIGH22(HIGHWORD(value))); // sethi (upper 22b of upper wrd), %o0
-    snippet.push_back(0x90122000 | LOW10(HIGHWORD(value)));  // or %o0, (lower 10b of upper wrd), %o0
-    snippet.push_back(0x912a3020);                           // sllx %o0, 32, %o0
-    snippet.push_back(0x13000000 | HIGH22(LOWWORD(value)));  // sethi (upper 22b of lwr wrd), %o1
-    snippet.push_back(0x90120009);                           // or %o0, %o1, %o0
-    snippet.push_back(0x90022000 | LOW10(LOWWORD(value)));   // add %o0, (lwr 10b of lwr wrd), %o0
+    // sethi (upper 22b of upper wrd), %o0
+    snippet.push_back(MK_SETHI(destReg, HIGH22(HIGHWORD(value))));
+
+    // or %o0, (lower 10b of upper wrd), %o0
+    snippet.push_back(MK_LOGIC_IMM(OP3_OR, destReg, destReg, LOW10(HIGHWORD(value))));
+
+    // sllx %o0, 32, %o0
+    snippet.push_back(MK_SHIFTX(OP3_SLL, destReg, destReg, 32));
+
+    // sethi (upper 22b of lwr wrd), %o1
+    snippet.push_back(MK_SETHI(tmpReg, HIGH22(LOWWORD(value))));
+
+    // or %o0, %o1, %o0
+    snippet.push_back(MK_LOGIC(OP3_OR, destReg, destReg, tmpReg));
+
+    // add %o0, (lwr 10b of lwr wrd), %o0
+    snippet.push_back(MK_ADD_R_I(destReg, destReg, LOW10(LOWWORD(value))));
 
     assert(snippet.size() - initSize == getGenLoad64Size() &&
-           "Unexpected number of instructions in code sequence for 64-bit value -> %o0");
+           "Unexpected number of instructions in code sequence for 64-bit value -> %destReg");
 }


Index: llvm/lib/Reoptimizer/Inst/InstManip.h
diff -u llvm/lib/Reoptimizer/Inst/InstManip.h:1.2 llvm/lib/Reoptimizer/Inst/InstManip.h:1.3
--- llvm/lib/Reoptimizer/Inst/InstManip.h:1.2	Thu Apr 10 00:35:03 2003
+++ llvm/lib/Reoptimizer/Inst/InstManip.h	Thu Apr 10 15:33:32 2003
@@ -43,9 +43,6 @@
     unsigned        getGenLoad64Size() const { return 6; }
 
   private:
-    ////////////////
-    // Instruction constants and field-extraction "macros", etc.
-
     // Branch-always (annul bit high) instruction base (i.e. address not filled in yet)
     static const unsigned BRANCH_ALWAYS_BASE = 0x30480000;
 };