[llvm-commits] CVS: llvm/lib/Target/X86/MachineCodeEmitter.cpp
Chris Lattner
lattner at cs.uiuc.edu
Sat Dec 28 14:27:05 PST 2002
Changes in directory llvm/lib/Target/X86:
MachineCodeEmitter.cpp updated: 1.16 -> 1.17
---
Log message:
* Convert to a MachineFunctionPass
* ctor doesn't take TM argument
* handle direct ESP references correctly!
---
Diffs of the changes:
Index: llvm/lib/Target/X86/MachineCodeEmitter.cpp
diff -u llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.16 llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.17
--- llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.16 Tue Dec 24 23:09:21 2002
+++ llvm/lib/Target/X86/MachineCodeEmitter.cpp Sat Dec 28 14:24:48 2002
@@ -9,21 +9,19 @@
#include "X86.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
-#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Value.h"
namespace {
- class Emitter : public FunctionPass {
- X86TargetMachine &TM;
- const X86InstrInfo ⅈ
+ class Emitter : public MachineFunctionPass {
+ const X86InstrInfo *II;
MachineCodeEmitter &MCE;
public:
- Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
- : TM(tm), II(TM.getInstrInfo()), MCE(mce) {}
+ Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
- bool runOnFunction(Function &F);
+ bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const {
return "X86 Machine Code Emitter";
@@ -52,12 +50,12 @@
///
bool X86TargetMachine::addPassesToEmitMachineCode(PassManager &PM,
MachineCodeEmitter &MCE) {
- PM.add(new Emitter(*this, MCE));
+ PM.add(new Emitter(MCE));
return false;
}
-bool Emitter::runOnFunction(Function &F) {
- MachineFunction &MF = MachineFunction::get(&F);
+bool Emitter::runOnMachineFunction(MachineFunction &MF) {
+ II = &((X86TargetMachine&)MF.getTarget()).getInstrInfo();
MCE.startFunction(MF);
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
@@ -190,7 +188,11 @@
emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
} else {
unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
- unsigned IndexRegNo = getX86RegNum(IndexReg.getReg());
+ unsigned IndexRegNo;
+ if (IndexReg.getReg())
+ IndexRegNo = getX86RegNum(IndexReg.getReg());
+ else
+ IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
emitSIBByte(SS, IndexRegNo, BaseRegNo);
}
@@ -220,7 +222,7 @@
void Emitter::emitInstruction(MachineInstr &MI) {
unsigned Opcode = MI.getOpcode();
- const MachineInstrDescriptor &Desc = II.get(Opcode);
+ const MachineInstrDescriptor &Desc = II->get(Opcode);
// Emit instruction prefixes if neccesary
if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
@@ -237,7 +239,7 @@
default: break; // No prefix!
}
- unsigned char BaseOpcode = II.getBaseOpcodeFor(Opcode);
+ unsigned char BaseOpcode = II->getBaseOpcodeFor(Opcode);
switch (Desc.TSFlags & X86II::FormMask) {
default: assert(0 && "Unknown FormMask value!");
case X86II::Pseudo:
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