[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp X86TargetMachine.h

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86TargetMachine.cpp updated: 1.8 -> 1.9
X86TargetMachine.h updated: 1.4 -> 1.5

---
Log message:

Changes to allow for a configurable target machine that allows big endian and/or long pointer operation


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Diffs of the changes:

Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.8 llvm/lib/Target/X86/X86TargetMachine.cpp:1.9
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.8	Mon Dec 16 20:51:15 2002
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Mon Dec 23 18:04:01 2002
@@ -5,11 +5,11 @@
 //===----------------------------------------------------------------------===//
 
 #include "X86TargetMachine.h"
+#include "X86.h"
 #include "llvm/Transforms/Scalar.h"
 #include "llvm/Target/TargetMachineImpls.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/PassManager.h"
-#include "X86.h"
 #include "Support/CommandLine.h"
 #include "Support/Statistic.h"
 #include <iostream>
@@ -17,17 +17,26 @@
 namespace {
   cl::opt<bool> NoLocalRA("no-local-ra",
                           cl::desc("Use Simple RA instead of Local RegAlloc"));
+  cl::opt<bool> PrintCode("print-machineinstrs",
+			  cl::desc("Print generated machine code"));
 }
 
 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
 // that implements the X86 backend.
 //
-TargetMachine *allocateX86TargetMachine() { return new X86TargetMachine(); }
+TargetMachine *allocateX86TargetMachine(unsigned Configuration) {
+  return new X86TargetMachine(Configuration);
+}
 
 
 /// X86TargetMachine ctor - Create an ILP32 architecture model
 ///
-X86TargetMachine::X86TargetMachine() : TargetMachine("X86", 1, 4, 4, 4) {
+X86TargetMachine::X86TargetMachine(unsigned Config)
+  : TargetMachine("X86", 
+		  (Config & TM::EndianMask) == TM::LittleEndian,
+		  1, 4, 
+		  (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4,
+		  (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4) {
 }
 
 
@@ -46,7 +55,8 @@
   // TODO: optional optimizations go here
 
   // Print the instruction selected machine code...
-  DEBUG(PM.add(createMachineFunctionPrinterPass()));
+  if (PrintCode)
+    PM.add(createMachineFunctionPrinterPass());
 
   // Perform register allocation to convert to a concrete x86 representation
   if (NoLocalRA)
@@ -58,7 +68,8 @@
   // PM.add(createMachineFunctionPrinterPass());
 
   // Print the register-allocated code
-  DEBUG(PM.add(createX86CodePrinterPass(*this, std::cerr)));
+  if (PrintCode)
+    PM.add(createX86CodePrinterPass(*this, std::cerr));
 
   return false; // success!
 }


Index: llvm/lib/Target/X86/X86TargetMachine.h
diff -u llvm/lib/Target/X86/X86TargetMachine.h:1.4 llvm/lib/Target/X86/X86TargetMachine.h:1.5
--- llvm/lib/Target/X86/X86TargetMachine.h:1.4	Mon Dec  2 15:50:41 2002
+++ llvm/lib/Target/X86/X86TargetMachine.h	Mon Dec 23 18:04:01 2002
@@ -13,7 +13,7 @@
 class X86TargetMachine : public TargetMachine {
   X86InstrInfo instrInfo;
 public:
-  X86TargetMachine();
+  X86TargetMachine(unsigned Configuration);
 
   virtual const X86InstrInfo     &getInstrInfo() const { return instrInfo; }
   virtual const MachineSchedInfo &getSchedInfo() const { abort(); }