[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.19 -> 1.20

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Log message:

Register allocator is responsible for spilling callee saved regs


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Diffs of the changes:

Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.19 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.20
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.19	Mon Dec 16 16:29:30 2002
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Mon Dec 16 20:48:57 2002
@@ -117,14 +117,6 @@
   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
   MachineBasicBlock::iterator MBBI = MBB.begin();
 
-  // PUSH all callee-save registers
-  const unsigned* regs = getCalleeSaveRegs();
-  while (*regs) {
-    MachineInstr *MI = BuildMI(X86::PUSHr32, 1).addReg(*regs);
-    MBBI = ++MBB.insert(MBBI, MI);
-    ++regs;
-  }
-
   // PUSH ebp
   MachineInstr *MI = BuildMI(X86::PUSHr32, 1).addReg(X86::EBP);
   MBBI = ++MBB.insert(MBBI, MI);
@@ -144,15 +136,7 @@
   assert((*MBBI)->getOpcode() == X86::RET &&
          "Can only insert epilog into returning blocks");
 
-  // insert LEAVE
-  MBBI = ++MBB.insert(MBBI, BuildMI(X86::LEAVE, 0));
-
-  // POP all callee-save registers in REVERSE ORDER
-  static const unsigned regs[] = { X86::EBX, X86::EDI, X86::ESI,
-                                   MRegisterInfo::NoRegister };
-  unsigned idx = 0;
-  while (regs[idx]) {
-    MachineInstr *MI = BuildMI(X86::POPr32, 0, regs[idx++]);
-    MBBI = ++(MBB.insert(MBBI, MI));
-  }
+  // insert LEAVE: mov ESP, EBP; pop EBP
+  MBBI = ++MBB.insert(MBBI, BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP));
+  MBBI = ++MBB.insert(MBBI, BuildMI(X86::POPr32, 1).addReg(X86::EBP));
 }