[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen:

RegAllocSimple.cpp updated: 1.21 -> 1.22

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Log message:

Add a big assert making sure 2 address instructions are formed right


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Diffs of the changes:

Index: llvm/lib/CodeGen/RegAllocSimple.cpp
diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.21 llvm/lib/CodeGen/RegAllocSimple.cpp:1.22
--- llvm/lib/CodeGen/RegAllocSimple.cpp:1.21	Sun Dec 15 14:48:03 2002
+++ llvm/lib/CodeGen/RegAllocSimple.cpp	Sun Dec 15 15:02:20 2002
@@ -379,6 +379,12 @@
             if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
               // must be same register number as the first operand
               // This maps a = b + c into b += c, and saves b into a's spot
+              assert(MI->getOperand(1).isRegister()  &&
+                     MI->getOperand(1).getAllocatedRegNum() &&
+                     MF->getRegClass(virtualReg) ==
+                       PhysRegClasses[MI->getOperand(1).getAllocatedRegNum()] &&
+                     "Two address instruction invalid!");
+
               physReg = MI->getOperand(1).getAllocatedRegNum();
             } else {
               physReg = getFreeReg(virtualReg);