[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Chris Lattner
lattner at cs.uiuc.edu
Sun Dec 15 02:02:01 PST 2002
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.90 -> 1.91
MachineInstrBuilder.h updated: 1.8 -> 1.9
---
Log message:
Add capability to have a MachineBasicBlock as an operand to a MachineInstr
Add a bunch of methods to MachineOperand is* to reduce usage of MO_foo
---
Diffs of the changes:
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.90 llvm/include/llvm/CodeGen/MachineInstr.h:1.91
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.90 Fri Nov 22 16:40:52 2002
+++ llvm/include/llvm/CodeGen/MachineInstr.h Sun Dec 15 02:01:02 2002
@@ -79,6 +79,7 @@
MO_SignExtendedImmed,
MO_UnextendedImmed,
MO_PCRelativeDisp,
+ MO_MachineBasicBlock, // MachineBasicBlock reference
};
private:
@@ -98,23 +99,25 @@
// including hidden operands required for
// the generated machine code.
int64_t immedVal; // constant value for an explicit constant
+
+ MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
};
- MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
char flags; // see bit field definitions above
+ MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
int regNum; // register number for an explicit register
// will be set for a value after reg allocation
private:
MachineOperand()
: immedVal(0),
- opType(MO_VirtualRegister),
flags(0),
+ opType(MO_VirtualRegister),
regNum(-1) {}
MachineOperand(int64_t ImmVal, MachineOperandType OpTy)
: immedVal(ImmVal),
- opType(OpTy),
flags(0),
+ opType(OpTy),
regNum(-1) {}
MachineOperand(int Reg, MachineOperandType OpTy, MOTy::UseType UseTy)
@@ -139,11 +142,14 @@
}
}
+ MachineOperand(MachineBasicBlock *mbb)
+ : MBB(mbb), flags(0), opType(MO_MachineBasicBlock), regNum(-1) {}
+
public:
MachineOperand(const MachineOperand &M)
: immedVal(M.immedVal),
- opType(M.opType),
flags(M.flags),
+ opType(M.opType),
regNum(M.regNum) {}
~MachineOperand() {}
@@ -163,8 +169,17 @@
return (opType == MO_VirtualRegister || opType == MO_MachineRegister)
&& regNum >= MRegisterInfo::FirstVirtualRegister;
}
-
+ bool isPhysicalRegister() const {
+ return (opType == MO_VirtualRegister || opType == MO_MachineRegister)
+ && regNum < MRegisterInfo::FirstVirtualRegister;
+ }
+ bool isRegister() const { return isVirtualRegister() || isPhysicalRegister();}
bool isMachineRegister() const { return !isVirtualRegister(); }
+ bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
+ bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
+ bool isImmediate() const {
+ return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
+ }
inline Value* getVRegValue () const {
assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
@@ -180,9 +195,14 @@
return regNum;
}
inline int64_t getImmedValue () const {
- assert(opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed);
+ assert(isImmediate());
return immedVal;
}
+ MachineBasicBlock *getMachineBasicBlock() const {
+ assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
+ return MBB;
+ }
+
bool opIsDef () const { return flags & DEFFLAG; }
bool opIsDefAndUse () const { return flags & DEFUSEFLAG; }
bool opHiBits32 () const { return flags & HIFLAG32; }
@@ -482,6 +502,11 @@
MachineOperand::MO_SignExtendedImmed));
}
+ void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
+ assert(!OperandsComplete() &&
+ "Trying to add an operand to a machine instr that is already done!");
+ operands.push_back(MachineOperand(MBB));
+ }
unsigned substituteValue(const Value* oldVal, Value* newVal,
bool defsOnly = true);
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.8 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.9
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.8 Fri Dec 13 03:33:06 2002
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Sun Dec 15 02:01:02 2002
@@ -81,6 +81,11 @@
MI->addZeroExtImmOperand(Val);
return *this;
}
+
+ const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
+ MI->addMachineBasicBlockOperand(MBB);
+ return *this;
+ }
};
/// BuildMI - Builder interface. Specify how to create the initial instruction
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