[llvm-commits] CVS: llvm/lib/Target/X86/MachineCodeEmitter.cpp Printer.cpp X86InstrInfo.def X86InstrInfo.h
Chris Lattner
lattner at cs.uiuc.edu
Thu Dec 12 21:53:01 PST 2002
Changes in directory llvm/lib/Target/X86:
MachineCodeEmitter.cpp updated: 1.8 -> 1.9
Printer.cpp updated: 1.24 -> 1.25
X86InstrInfo.def updated: 1.37 -> 1.38
X86InstrInfo.h updated: 1.16 -> 1.17
---
Log message:
Rename MemArg* to Arg*
---
Diffs of the changes:
Index: llvm/lib/Target/X86/MachineCodeEmitter.cpp
diff -u llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.8 llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.9
--- llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.8 Thu Dec 12 21:50:13 2002
+++ llvm/lib/Target/X86/MachineCodeEmitter.cpp Thu Dec 12 21:51:55 2002
@@ -204,13 +204,13 @@
}
unsigned sizeOfPtr (const MachineInstrDescriptor &Desc) {
- switch (Desc.TSFlags & X86II::MemArgMask) {
- case X86II::MemArg8: return 1;
- case X86II::MemArg16: return 2;
- case X86II::MemArg32: return 4;
- case X86II::MemArg64: return 8;
- case X86II::MemArg80: return 10;
- case X86II::MemArg128: return 16;
+ switch (Desc.TSFlags & X86II::ArgMask) {
+ case X86II::Arg8: return 1;
+ case X86II::Arg16: return 2;
+ case X86II::Arg32: return 4;
+ case X86II::Arg64: return 8;
+ case X86II::Arg80: return 10;
+ case X86II::Arg128: return 16;
default: assert(0 && "Memory size not set!");
}
}
Index: llvm/lib/Target/X86/Printer.cpp
diff -u llvm/lib/Target/X86/Printer.cpp:1.24 llvm/lib/Target/X86/Printer.cpp:1.25
--- llvm/lib/Target/X86/Printer.cpp:1.24 Thu Dec 5 02:30:40 2002
+++ llvm/lib/Target/X86/Printer.cpp Thu Dec 12 21:51:55 2002
@@ -120,13 +120,13 @@
}
static const std::string sizePtr (const MachineInstrDescriptor &Desc) {
- switch (Desc.TSFlags & X86II::MemArgMask) {
- case X86II::MemArg8: return "BYTE PTR";
- case X86II::MemArg16: return "WORD PTR";
- case X86II::MemArg32: return "DWORD PTR";
- case X86II::MemArg64: return "QWORD PTR";
- case X86II::MemArg80: return "XWORD PTR";
- case X86II::MemArg128: return "128BIT PTR"; // dunno what the real one is
+ switch (Desc.TSFlags & X86II::ArgMask) {
+ case X86II::Arg8: return "BYTE PTR";
+ case X86II::Arg16: return "WORD PTR";
+ case X86II::Arg32: return "DWORD PTR";
+ case X86II::Arg64: return "QWORD PTR";
+ case X86II::Arg80: return "XWORD PTR";
+ case X86II::Arg128: return "128BIT PTR"; // dunno what the real one is
default: return "<SIZE?> PTR"; // crack being smoked
}
}
Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.37 llvm/lib/Target/X86/X86InstrInfo.def:1.38
--- llvm/lib/Target/X86/X86InstrInfo.def:1.37 Thu Dec 12 21:50:13 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def Thu Dec 12 21:51:55 2002
@@ -74,20 +74,20 @@
I(MOVrr8 , "movb", 0x88, 0, X86II::MRMDestReg, NoIR, NoIR) // R8 = R8
I(MOVrr16 , "movw", 0x89, 0, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 = R16
I(MOVrr32 , "movl", 0x89, 0, X86II::MRMDestReg, NoIR, NoIR) // R32 = R32
-I(MOVir8 , "movb", 0xB0, 0, X86II::AddRegFrm | X86II::MemArg8, NoIR, NoIR) // R8 = imm8
-I(MOVir16 , "movw", 0xB8, 0, X86II::AddRegFrm | X86II::MemArg16 | X86II::OpSize, NoIR, NoIR) // R16 = imm16
-I(MOVir32 , "movl", 0xB8, 0, X86II::AddRegFrm | X86II::MemArg32, NoIR, NoIR) // R32 = imm32
-I(MOVmr8 , "movb", 0x8A, 0, X86II::MRMSrcMem | X86II::MemArg8, NoIR, NoIR) // R8 = [mem]
+I(MOVir8 , "movb", 0xB0, 0, X86II::AddRegFrm | X86II::Arg8, NoIR, NoIR) // R8 = imm8
+I(MOVir16 , "movw", 0xB8, 0, X86II::AddRegFrm | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // R16 = imm16
+I(MOVir32 , "movl", 0xB8, 0, X86II::AddRegFrm | X86II::Arg32, NoIR, NoIR) // R32 = imm32
+I(MOVmr8 , "movb", 0x8A, 0, X86II::MRMSrcMem | X86II::Arg8, NoIR, NoIR) // R8 = [mem]
I(MOVmr16 , "movw", 0x8B, 0, X86II::MRMSrcMem | X86II::OpSize |
- X86II::MemArg16, NoIR, NoIR) // R16 = [mem]
-I(MOVmr32 , "movl", 0x8B, 0, X86II::MRMSrcMem | X86II::MemArg32, NoIR,
+ X86II::Arg16, NoIR, NoIR) // R16 = [mem]
+I(MOVmr32 , "movl", 0x8B, 0, X86II::MRMSrcMem | X86II::Arg32, NoIR,
NoIR) // R32 = [mem]
I(MOVrm8 , "movb", 0x88, 0, X86II::MRMDestMem | X86II::Void |
- X86II::MemArg8, NoIR, NoIR) // [mem] = R8
+ X86II::Arg8, NoIR, NoIR) // [mem] = R8
I(MOVrm16 , "movw", 0x89, 0, X86II::MRMDestMem | X86II::Void |
- X86II::OpSize | X86II::MemArg16, NoIR, NoIR) // [mem] = R16
+ X86II::OpSize | X86II::Arg16, NoIR, NoIR) // [mem] = R16
I(MOVrm32 , "movl", 0x89, 0, X86II::MRMDestMem | X86II::Void |
- X86II::MemArg32, NoIR, NoIR) // [mem] = R32
+ X86II::Arg32, NoIR, NoIR) // [mem] = R32
I(PUSHr32 , "pushl", 0x50, 0, X86II::AddRegFrm | X86II::Void, NoIR, NoIR)
I(POPr32 , "popl", 0x58, 0, X86II::AddRegFrm, NoIR, NoIR)
@@ -96,11 +96,11 @@
I(ADDrr8 , "addb", 0x00, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 += R8
I(ADDrr16 , "addw", 0x01, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 += R16
I(ADDrr32 , "addl", 0x01, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 += R32
-I(ADDri32 , "add", 0x81, M_2_ADDR_FLAG, X86II::MRMS0r | X86II::MemArg32, NoIR, NoIR) // R32 += imm32
+I(ADDri32 , "add", 0x81, M_2_ADDR_FLAG, X86II::MRMS0r | X86II::Arg32, NoIR, NoIR) // R32 += imm32
I(SUBrr8 , "subb", 0x2A, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 -= R8
I(SUBrr16 , "subw", 0x2B, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 -= R16
I(SUBrr32 , "subl", 0x2B, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 -= R32
-I(SUBri32 , "sub", 0x81, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::MemArg32, NoIR, NoIR) // R32 -= imm32
+I(SUBri32 , "sub", 0x81, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg32, NoIR, NoIR) // R32 -= imm32
I(MULrr8 , "mulb", 0xF6, 0, X86II::MRMS4r | X86II::Void, O_AL, O_AX) // AX = AL*R8
I(MULrr16 , "mulw", 0xF7, 0, X86II::MRMS4r | X86II::Void | // DX:AX= AX*R16
X86II::OpSize, O_AX, T_AXDX)
@@ -135,21 +135,21 @@
I(SHLrr8 , "shlb", 0xD2, M_2_ADDR_FLAG, X86II::MRMS4r, O_CL, NoIR) // R8 <<= cl
I(SHLrr16 , "shlw", 0xD3, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::OpSize, O_CL, NoIR) // R16 <<= cl
I(SHLrr32 , "shll", 0xD3, M_2_ADDR_FLAG, X86II::MRMS4r, O_CL, NoIR) // R32 <<= cl
-I(SHLir8 , "shlb", 0xC0, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::MemArg8, NoIR, NoIR) // R8 <<= imm8
-I(SHLir16 , "shlw", 0xC1, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::MemArg8 | X86II::OpSize, NoIR, NoIR) // R16 <<= imm8
-I(SHLir32 , "shll", 0xC1, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::MemArg8, NoIR, NoIR) // R32 <<= imm8
+I(SHLir8 , "shlb", 0xC0, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8, NoIR, NoIR) // R8 <<= imm8
+I(SHLir16 , "shlw", 0xC1, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8 | X86II::OpSize, NoIR, NoIR) // R16 <<= imm8
+I(SHLir32 , "shll", 0xC1, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8, NoIR, NoIR) // R32 <<= imm8
I(SHRrr8 , "shrb", 0xD2, M_2_ADDR_FLAG, X86II::MRMS5r, O_CL, NoIR) // R8 >>>= cl
I(SHRrr16 , "shrw", 0xD3, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::OpSize, O_CL, NoIR) // R16 >>>= cl
I(SHRrr32 , "shrl", 0xD3, M_2_ADDR_FLAG, X86II::MRMS5r, O_CL, NoIR) // R32 >>>= cl
-I(SHRir8 , "shrb", 0xC0, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::MemArg8, NoIR, NoIR) // R8 >>>= imm8
-I(SHRir16 , "shrw", 0xC1, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::MemArg8 | X86II::OpSize, NoIR, NoIR) // R16 >>>= imm8
-I(SHRir32 , "shrl", 0xC1, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::MemArg8, NoIR, NoIR) // R32 >>>= imm8
+I(SHRir8 , "shrb", 0xC0, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8, NoIR, NoIR) // R8 >>>= imm8
+I(SHRir16 , "shrw", 0xC1, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8 | X86II::OpSize, NoIR, NoIR) // R16 >>>= imm8
+I(SHRir32 , "shrl", 0xC1, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8, NoIR, NoIR) // R32 >>>= imm8
I(SARrr8 , "sarb", 0xD2, M_2_ADDR_FLAG, X86II::MRMS7r, O_CL, NoIR) // R8 >>= cl
I(SARrr16 , "sarw", 0xD3, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::OpSize, O_CL, NoIR) // R16 >>= cl
I(SARrr32 , "sarl", 0xD3, M_2_ADDR_FLAG, X86II::MRMS7r, O_CL, NoIR) // R32 >>= cl
-I(SARir8 , "sarb", 0xC0, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::MemArg8, NoIR, NoIR) // R8 >>= imm8
-I(SARir16 , "sarw", 0xC1, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::MemArg8 | X86II::OpSize, NoIR, NoIR) // R16 >>= imm8
-I(SARir32 , "sarl", 0xC1, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::MemArg8, NoIR, NoIR) // R32 >>= imm8
+I(SARir8 , "sarb", 0xC0, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::Arg8, NoIR, NoIR) // R8 >>= imm8
+I(SARir16 , "sarw", 0xC1, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::Arg8 | X86II::OpSize, NoIR, NoIR) // R16 >>= imm8
+I(SARir32 , "sarl", 0xC1, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::Arg8, NoIR, NoIR) // R32 >>= imm8
// Floating point loads
I(FLDr32 , "flds", 0xD9, 0, X86II::MRMS0m, NoIR, NoIR) // push float
@@ -178,7 +178,7 @@
I(CMPrr8 , "cmpb", 0x38, 0, X86II::MRMDestReg, NoIR, NoIR) // compare R8,R8
I(CMPrr16 , "cmpw", 0x39, 0, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // compare R16,R16
I(CMPrr32 , "cmpl", 0x39, 0, X86II::MRMDestReg, NoIR, NoIR) // compare R32,R32
-I(CMPri8 , "cmp", 0x80, 0, X86II::MRMS7r | X86II::MemArg8, NoIR, NoIR) // compare R8, imm8
+I(CMPri8 , "cmp", 0x80, 0, X86II::MRMS7r | X86II::Arg8, NoIR, NoIR) // compare R8, imm8
// Sign extenders (first 3 are good for DIV/IDIV; the others are more general)
I(CBW , "cbw", 0x98, 0, X86II::RawFrm, O_AL, O_AX) // AX = signext(AL)
Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.16 llvm/lib/Target/X86/X86InstrInfo.h:1.17
--- llvm/lib/Target/X86/X86InstrInfo.h:1.16 Thu Dec 5 02:30:40 2002
+++ llvm/lib/Target/X86/X86InstrInfo.h Thu Dec 12 21:51:55 2002
@@ -84,13 +84,13 @@
// This three-bit field describes the size of a memory operand.
// I'm just being paranoid not using the zero value; there's
// probably no reason you couldn't use it.
- MemArg8 = 0x1 << 8,
- MemArg16 = 0x2 << 8,
- MemArg32 = 0x3 << 8,
- MemArg64 = 0x4 << 8,
- MemArg80 = 0x5 << 8,
- MemArg128 = 0x6 << 8,
- MemArgMask = 0x7 << 8,
+ Arg8 = 0x1 << 8,
+ Arg16 = 0x2 << 8,
+ Arg32 = 0x3 << 8,
+ Arg64 = 0x4 << 8,
+ Arg80 = 0x5 << 8,
+ Arg128 = 0x6 << 8,
+ ArgMask = 0x7 << 8,
};
}
More information about the llvm-commits
mailing list