[llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h
Misha Brukman
brukman at cs.uiuc.edu
Thu Dec 12 17:21:02 PST 2002
Changes in directory llvm/include/llvm/Target:
MachineInstrInfo.h updated: 1.36 -> 1.37
---
Log message:
Define the 2-address flag used by X86 instructions (add,sub,and,or,xor) that
need to be declared as such.
---
Diffs of the changes:
Index: llvm/include/llvm/Target/MachineInstrInfo.h
diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.36 llvm/include/llvm/Target/MachineInstrInfo.h:1.37
--- llvm/include/llvm/Target/MachineInstrInfo.h:1.36 Mon Dec 2 23:41:32 2002
+++ llvm/include/llvm/Target/MachineInstrInfo.h Thu Dec 12 17:19:51 2002
@@ -54,7 +54,8 @@
const unsigned M_STORE_FLAG = 1 << 12;
const unsigned M_DUMMY_PHI_FLAG = 1 << 13;
const unsigned M_PSEUDO_FLAG = 1 << 14;
-
+// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
+const unsigned M_2_ADDR_FLAG = 1 << 15;
struct MachineInstrDescriptor {
const char * Name; // Assembly language mnemonic for the opcode.
@@ -185,6 +186,9 @@
}
bool isPseudoInstr(const MachineOpCode opCode) const {
return get(opCode).Flags & M_PSEUDO_FLAG;
+ }
+ bool isTwoAddrInstr(const MachineOpCode opCode) const {
+ return get(opCode).Flags & M_2_ADDR_FLAG;
}
// Check if an instruction can be issued before its operands are ready,
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