[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp

[Misha Brukman]

Changes in directory llvm/lib/CodeGen:

RegAllocSimple.cpp updated: 1.4 -> 1.5

---
Log message:

Added code generation for function prologues and epilogues.


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAllocSimple.cpp
diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.4 llvm/lib/CodeGen/RegAllocSimple.cpp:1.5
--- llvm/lib/CodeGen/RegAllocSimple.cpp:1.4	Wed Dec  4 13:24:45 2002
+++ llvm/lib/CodeGen/RegAllocSimple.cpp	Wed Dec  4 17:58:08 2002
@@ -12,6 +12,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Target/MachineInstrInfo.h"
 #include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include "llvm/Target/TargetMachine.h"
@@ -73,6 +74,12 @@
         RegClassIdx.clear();
     }
 
+    void cleanupAfterFunction() {
+      RegMap.clear();
+      SSA2PhysRegMap.clear();
+      NumBytesAllocated = 0;
+    }
+
     /// Moves value from memory into that register
     MachineBasicBlock::iterator
     moveUseToReg (MachineBasicBlock::iterator I, unsigned VirtReg,
@@ -150,7 +157,7 @@
   // Add move instruction(s)
   return RegInfo->loadRegOffset2Reg(CurrMBB, I, PhysReg,
                                     RegInfo->getFramePointer(),
-                                    stackOffset, regClass->getDataSize());
+                                    -stackOffset, regClass->getDataSize());
 }
 
 MachineBasicBlock::iterator
@@ -160,12 +167,12 @@
   const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
   assert(regClass);
 
-  unsigned offset = allocateStackSpaceFor(VirtReg, regClass);
+  unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
 
   // Add move instruction(s)
   return RegInfo->storeReg2RegOffset(CurrMBB, I, PhysReg,
                                      RegInfo->getFramePointer(),
-                                     offset, regClass->getDataSize());
+                                     -stackOffset, regClass->getDataSize());
 }
 
 MachineBasicBlock::iterator
@@ -184,23 +191,12 @@
 }
 
 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
-  RegMap.clear();
+  cleanupAfterFunction();
+
   unsigned virtualReg, physReg;
   DEBUG(std::cerr << "Machine Function " << "\n");
   MF = &Fn;
 
-#if 0
-  // FIXME: add prolog. we should preserve callee-save registers...
-  MachineFunction::iterator Fi = Fn.begin();
-  MachineBasicBlock &MBB = *Fi;
-  MachineBasicBlock::iterator MBBi = MBB.begin()
-  const unsigned* calleeSaveRegs = tm.getCalleeSaveRegs();
-  while (*calleeSaveRegs) {
-    //MBBi = saveRegToStack(MBBi, *calleeSaveRegs, 
-    ++calleeSaveRegs;
-  }
-#endif
-
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
        MBB != MBBe; ++MBB)
   {
@@ -252,7 +248,26 @@
 
   }
 
-  // FIXME: add epilog. we should preserve callee-save registers...
+  // add prologue we should preserve callee-save registers...
+  MachineFunction::iterator Fi = Fn.begin();
+  MachineBasicBlock *MBB = Fi;
+  MachineBasicBlock::iterator MBBi = MBB->begin();
+  RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
+
+  // add epilogue to restore the callee-save registers
+  // loop over the basic block
+  for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
+       MBB != MBBe; ++MBB)
+  {
+    // check if last instruction is a RET
+    MachineBasicBlock::iterator I = (*MBB).end();
+    MachineInstr *MI = *(--I);
+    const MachineInstrInfo &MII = TM.getInstrInfo();
+    if (MII.isReturn(MI->getOpcode())) {
+      // this block has a return instruction, add epilogue
+      RegInfo->emitEpilogue(MBB, I, NumBytesAllocated);
+    }
+  }
 
   return false;  // We never modify the LLVM itself.
 }