[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp
Chris Lattner
lattner at cs.uiuc.edu
Tue Dec 3 01:37:01 PST 2002
Changes in directory llvm/lib/Target/X86:
InstSelectSimple.cpp updated: 1.42 -> 1.43
---
Log message:
brg
Add support for cast ... to bool in visitCastInst (it's a start, anyways...)
---
Diffs of the changes:
Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.42 llvm/lib/Target/X86/InstSelectSimple.cpp:1.43
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.42 Mon Dec 2 18:51:09 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp Tue Dec 3 01:36:03 2002
@@ -641,9 +641,20 @@
//the former is that the register allocator could use any register it wants,
//but for now this obviously doesn't matter. :)
-// if target type is bool
-// Emit Compare
-// Emit Set-if-not-zero
+ Type *targetType = CI.getType ();
+ Value *operand = CI.getOperand (0);
+ unsigned int operandReg = getReg (operand);
+ Type *sourceType = operand->getType ();
+ unsigned int destReg = getReg (CI);
+
+ // cast to bool:
+ if (targetType == Type::BoolTy) {
+ // Emit Compare
+ BuildMI (BB, X86::CMPri8, 2).addReg (operandReg).addZImm (0);
+ // Emit Set-if-not-zero
+ BuildMI (BB, X86::SETNEr, 1, destReg);
+ return;
+ }
// if size of target type == size of source type
// Emit Mov reg(target) <- reg(source)
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