[llvm-commits] CVS: llvm/lib/Target/X86/Printer.cpp

Chris Lattner lattner at cs.uiuc.edu
Thu Nov 21 15:04:01 PST 2002


Changes in directory llvm/lib/Target/X86:

Printer.cpp updated: 1.13 -> 1.14

---
Log message:

Implement printing of store instructions


---
Diffs of the changes:

Index: llvm/lib/Target/X86/Printer.cpp
diff -u llvm/lib/Target/X86/Printer.cpp:1.13 llvm/lib/Target/X86/Printer.cpp:1.14
--- llvm/lib/Target/X86/Printer.cpp:1.13	Thu Nov 21 14:44:15 2002
+++ llvm/lib/Target/X86/Printer.cpp	Thu Nov 21 15:03:39 2002
@@ -379,6 +379,25 @@
     O << "\n";
     return;
   }
+
+  case X86II::MRMDestMem: {
+    // These instructions are the same as MRMDestReg, but instead of having a
+    // register reference for the mod/rm field, it's a memory reference.
+    //
+    assert(isMem(MI, 0) && MI->getNumOperands() == 4+1 &&
+           isReg(MI->getOperand(4)) && "Bad format for MRMDestMem!");
+    toHex(O, getBaseOpcodeFor(Opcode)) << " ";
+    emitMemModRMByte(O, MI, 0, getX86RegNum(MI->getOperand(4).getReg()));
+
+    O << "\n\t\t\t\t";
+    O << getName(MI->getOpCode()) << " <SIZE> PTR ";
+    printMemReference(O, MI, 0, RI);
+    O << ", ";
+    printOp(O, MI->getOperand(4), RI);
+    O << "\n";
+    return;
+  }
+
   case X86II::MRMSrcReg: {
     // There is a two forms that are acceptable for MRMSrcReg instructions,
     // those with 3 and 2 operands:
@@ -415,10 +434,7 @@
   case X86II::MRMSrcMem: {
     // These instructions are the same as MRMSrcReg, but instead of having a
     // register reference for the mod/rm field, it's a memory reference.
-
-    //I(MOVmr8      , "movb",  0x8A,             0, X86II::MRMSrcMem) 
-    // R8  = [mem]  8A/r
-
+    //
     assert(isReg(MI->getOperand(0)) &&
            (MI->getNumOperands() == 1+4 && isMem(MI, 1)) || 
            (MI->getNumOperands() == 2+4 && isReg(MI->getOperand(1)) && 
@@ -483,7 +499,6 @@
     return;
   }
 
-  case X86II::MRMDestMem:
   default:
     O << "\t\t\t-"; MI->print(O, TM); break;
   }





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