[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.def X86InstrInfo.h
Chris Lattner
lattner at cs.uiuc.edu
Sun Nov 17 20:00:01 PST 2002
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.def updated: 1.18 -> 1.19
X86InstrInfo.h updated: 1.8 -> 1.9
---
Log message:
Add instruction annotation about whether it has a 0x0F opcode prefix
---
Diffs of the changes:
Index: llvm/lib/Target/X86/X86InstrInfo.def
diff -u llvm/lib/Target/X86/X86InstrInfo.def:1.18 llvm/lib/Target/X86/X86InstrInfo.def:1.19
--- llvm/lib/Target/X86/X86InstrInfo.def:1.18 Sun Nov 17 19:37:48 2002
+++ llvm/lib/Target/X86/X86InstrInfo.def Sun Nov 17 19:59:28 2002
@@ -118,16 +118,16 @@
// Condition code ops, incl. set if equal/not equal/...
I(SAHF , "sahf", 0, 0) // flags = AH 9E
-I(SETA , "seta", 0, 0) // R8 = > unsign 0F 97
-I(SETAE , "setae", 0, 0) // R8 = >=unsign 0F 93
-I(SETB , "setb", 0, 0) // R8 = < unsign 0F 92
-I(SETBE , "setbe", 0, 0) // R8 = <=unsign 0F 96
-I(SETE , "sete", 0, 0) // R8 = == 0F 94
-I(SETG , "setg", 0, 0) // R8 = > signed 0F 9F
-I(SETGE , "setge", 0, 0) // R8 = >=signed 0F 9D
-I(SETL , "setl", 0, 0) // R8 = < signed 0F 9C
-I(SETLE , "setle", 0, 0) // R8 = <=signed 0F 9E
-I(SETNE , "setne", 0, 0) // R8 = != 0F 95
+I(SETA , "seta", 0, X86II::TB) // R8 = > unsign 0F 97
+I(SETAE , "setae", 0, X86II::TB) // R8 = >=unsign 0F 93
+I(SETB , "setb", 0, X86II::TB) // R8 = < unsign 0F 92
+I(SETBE , "setbe", 0, X86II::TB) // R8 = <=unsign 0F 96
+I(SETE , "sete", 0, X86II::TB) // R8 = == 0F 94
+I(SETG , "setg", 0, X86II::TB) // R8 = > signed 0F 9F
+I(SETGE , "setge", 0, X86II::TB) // R8 = >=signed 0F 9D
+I(SETL , "setl", 0, X86II::TB) // R8 = < signed 0F 9C
+I(SETLE , "setle", 0, X86II::TB) // R8 = <=signed 0F 9E
+I(SETNE , "setne", 0, X86II::TB) // R8 = != 0F 95
// Integer comparisons
I(CMPrr8 , "cmpb", 0, 0) // compare R8,R8 38/r
@@ -138,12 +138,12 @@
I(CBW , "cbw", 0, 0) // AX = signext(AL) 98
I(CWD , "cwd", 0, 0) // DX:AX = signext(AX) 99
I(CDQ , "cdq", 0, 0) // EDX:EAX = signext(EAX) 99
-I(MOVSXr16r8 , "movsx", 0, 0) // R32 = signext(R8) 0F BE /r
-I(MOVSXr32r8 , "movsx", 0, 0) // R32 = signext(R8) 0F BE /r
-I(MOVSXr32r16 , "movsx", 0, 0) // R32 = signext(R16) 0F BF /r
-I(MOVZXr16r8 , "movzx", 0, 0) // R32 = zeroext(R8) 0F B6 /r
-I(MOVZXr32r8 , "movzx", 0, 0) // R32 = zeroext(R8) 0F B6 /r
-I(MOVZXr32r16 , "movzx", 0, 0) // R32 = zeroext(R16) 0F B7 /r
+I(MOVSXr16r8 , "movsx", 0, X86II::TB) // R32 = signext(R8) 0F BE /r
+I(MOVSXr32r8 , "movsx", 0, X86II::TB) // R32 = signext(R8) 0F BE /r
+I(MOVSXr32r16 , "movsx", 0, X86II::TB) // R32 = signext(R16) 0F BF /r
+I(MOVZXr16r8 , "movzx", 0, X86II::TB) // R32 = zeroext(R8) 0F B6 /r
+I(MOVZXr32r8 , "movzx", 0, X86II::TB) // R32 = zeroext(R8) 0F B6 /r
+I(MOVZXr32r16 , "movzx", 0, X86II::TB) // R32 = zeroext(R16) 0F B7 /r
// At this point, I is dead, so undefine the macro
#undef I
Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.8 llvm/lib/Target/X86/X86InstrInfo.h:1.9
--- llvm/lib/Target/X86/X86InstrInfo.h:1.8 Sun Nov 17 17:20:37 2002
+++ llvm/lib/Target/X86/X86InstrInfo.h Sun Nov 17 19:59:28 2002
@@ -15,7 +15,14 @@
///
namespace X86II {
enum {
- Void = 1 << 0, // Set if this instruction produces no value
+ /// Void - Set if this instruction produces no value
+ Void = 1 << 0,
+
+ // TB - TwoByte - Set if this instruction has a two byte opcode, which
+ // starts with a 0x0F byte before the real opcode.
+ TB = 1 << 1,
+
+
};
}
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