[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetMachine.cpp X86TargetMachine.h InstSelectSimple.cpp Printer.cpp X86.h

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86TargetMachine.cpp added (r1.1)
X86TargetMachine.h added (r1.1)
InstSelectSimple.cpp updated: 1.6 -> 1.7
Printer.cpp updated: 1.2 -> 1.3
X86.h updated: 1.4 -> 1.5

---
Log message:

Convert backend to use passes, implement X86TargetMachine


---
Diffs of the changes:

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.6 llvm/lib/Target/X86/InstSelectSimple.cpp:1.7
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.6	Tue Oct 29 15:05:24 2002
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Tue Oct 29 16:37:54 2002
@@ -10,28 +10,32 @@
 #include "llvm/iTerminators.h"
 #include "llvm/Type.h"
 #include "llvm/Constants.h"
+#include "llvm/Pass.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Support/InstVisitor.h"
 #include <map>
 
 namespace {
-  struct ISel : public InstVisitor<ISel> { // eventually will be a FunctionPass
+  struct ISel : public FunctionPass, InstVisitor<ISel> {
+    TargetMachine &TM;
     MachineFunction *F;                    // The function we are compiling into
     MachineBasicBlock *BB;                 // The current MBB we are compiling
 
     unsigned CurReg;
     std::map<Value*, unsigned> RegMap;  // Mapping between Val's and SSA Regs
 
-    ISel(MachineFunction *f)
-      : F(f), BB(0), CurReg(MRegisterInfo::FirstVirtualRegister) {}
+    ISel(TargetMachine &tm)
+      : TM(tm), F(0), BB(0), CurReg(MRegisterInfo::FirstVirtualRegister) {}
 
     /// runOnFunction - Top level implementation of instruction selection for
     /// the entire function.
     ///
-    bool runOnFunction(Function &F) {
-      visit(F);
+    bool runOnFunction(Function &Fn) {
+      F = new MachineFunction(&Fn, TM);
+      visit(Fn);
       RegMap.clear();
+      F = 0;
       return false;  // We never modify the LLVM itself.
     }
 
@@ -161,14 +165,10 @@
   }
 }
 
-
-
-/// X86SimpleInstructionSelection - This function converts an LLVM function into
-/// a machine code representation is a very simple peep-hole fashion.  The
+/// createSimpleX86InstructionSelector - This pass converts an LLVM function
+/// into a machine code representation is a very simple peep-hole fashion.  The
 /// generated code sucks but the implementation is nice and simple.
 ///
-MachineFunction *X86SimpleInstructionSelection(Function &F, TargetMachine &TM) {
-  MachineFunction *Result = new MachineFunction(&F, TM);
-  ISel(Result).runOnFunction(F);
-  return Result;
+Pass *createSimpleX86InstructionSelector(TargetMachine &TM) {
+  return new ISel(TM);
 }


Index: llvm/lib/Target/X86/Printer.cpp
diff -u llvm/lib/Target/X86/Printer.cpp:1.2 llvm/lib/Target/X86/Printer.cpp:1.3
--- llvm/lib/Target/X86/Printer.cpp:1.2	Mon Oct 28 17:55:19 2002
+++ llvm/lib/Target/X86/Printer.cpp	Tue Oct 29 16:37:54 2002
@@ -6,16 +6,37 @@
 //===----------------------------------------------------------------------===//
 
 #include "X86.h"
+#include "llvm/Pass.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include <iostream>
 
-/// X86PrintCode - Print out the specified machine code function to the
-/// specified stream.  This function should work regardless of whether or not
-/// the function is in SSA form or not, although when in SSA form, we obviously
-/// don't care about being consumable by an assembler.
-///
-void X86PrintCode(const MachineFunction *MF, std::ostream &O) {
+namespace {
+  struct Printer : public FunctionPass {
+    TargetMachine &TM;
+    std::ostream &O;
+
+    Printer(TargetMachine &tm, std::ostream &o) : TM(tm), O(o) {}
+
+    bool runOnFunction(Function &F);
+  };
+}
+
+bool Printer::runOnFunction(Function &F) {
+  MachineFunction &MF = MachineFunction::get(&F);
   O << "x86 printing not implemented yet!\n";
+  
+  // This should use the X86InstructionInfo::print method to print assembly
+  // for each instruction
+  return false;
+}
 
-  // This should use the X86InstructionInfo::print method to print assembly for
-  // each instruction
+
+
+
+/// createX86CodePrinterPass - Print out the specified machine code function to
+/// the specified stream.  This function should work regardless of whether or
+/// not the function is in SSA form or not.
+///
+Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O) {
+  return new Printer(TM, O);
 }


Index: llvm/lib/Target/X86/X86.h
diff -u llvm/lib/Target/X86/X86.h:1.4 llvm/lib/Target/X86/X86.h:1.5
--- llvm/lib/Target/X86/X86.h:1.4	Tue Oct 29 15:05:24 2002
+++ llvm/lib/Target/X86/X86.h	Tue Oct 29 16:37:54 2002
@@ -11,34 +11,32 @@
 #define TARGET_X86_H
 
 #include <iosfwd>
-class MachineFunction;
-class Function;
 class TargetMachine;
+class Pass;
 
-/// X86PrintCode - Print out the specified machine code function to the
-/// specified stream.  This function should work regardless of whether or not
-/// the function is in SSA form or not.
-///
-void X86PrintCode(const MachineFunction *MF, std::ostream &O);
-
-/// X86SimpleInstructionSelection - This function converts an LLVM function into
-/// a machine code representation is a very simple peep-hole fashion.  The
+/// createSimpleX86InstructionSelector - This pass converts an LLVM function
+/// into a machine code representation is a very simple peep-hole fashion.  The
 /// generated code sucks but the implementation is nice and simple.
 ///
-MachineFunction *X86SimpleInstructionSelection(Function &F, TargetMachine &TM);
+Pass *createSimpleX86InstructionSelector(TargetMachine &TM);
 
 /// X86SimpleRegisterAllocation - This function converts the specified machine
 /// code function from SSA form to use explicit registers by spilling every
 /// register.  Wow, great policy huh?
 ///
-inline void X86SimpleRegisterAllocation(MachineFunction *MF) {}
+Pass *createSimpleX86RegisterAllocator(TargetMachine &TM);
+
+/// createX86CodePrinterPass - Print out the specified machine code function to
+/// the specified stream.  This function should work regardless of whether or
+/// not the function is in SSA form or not.
+///
+Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O);
 
 /// X86EmitCodeToMemory - This function converts a register allocated function
 /// into raw machine code in a dynamically allocated chunk of memory.  A pointer
 /// to the start of the function is returned.
 ///
-inline void *X86EmitCodeToMemory(MachineFunction *MF) { return 0; }
-
+Pass *createEmitX86CodeToMemory(TargetMachine &TM);
 
 // Put symbolic names in a namespace to avoid causing these to clash with all
 // kinds of other things...