[llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp SparcInternals.h

[Chris Lattner]

Changes in directory llvm/lib/Target/Sparc:

Sparc.cpp updated: 1.48 -> 1.49
SparcInternals.h updated: 1.68 -> 1.69

---
Log message:

Move addPassesToEmitAssembly from TargetMachine to UltraSparc because it 
really is sparc specific.



---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/Sparc.cpp
diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.48 llvm/lib/Target/Sparc/Sparc.cpp:1.49
--- llvm/lib/Target/Sparc/Sparc.cpp:1.48	Sun Oct 27 18:28:31 2002
+++ llvm/lib/Target/Sparc/Sparc.cpp	Sun Oct 27 19:03:43 2002
@@ -8,7 +8,19 @@
 #include "SparcInternals.h"
 #include "llvm/Target/Sparc.h"
 #include "llvm/Function.h"
+#include "llvm/PassManager.h"
+#include "llvm/Transforms/Scalar.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/PreSelection.h"
+#include "llvm/CodeGen/StackSlots.h"
+#include "llvm/CodeGen/PeepholeOpts.h"
+#include "llvm/CodeGen/InstrSelection.h"
+#include "llvm/CodeGen/InstrScheduling.h"
+#include "llvm/CodeGen/RegisterAllocation.h"
+#include "llvm/CodeGen/MachineCodeForInstruction.h"
+#include "llvm/Reoptimizer/Mapping/MappingInfo.h" 
+#include "llvm/Reoptimizer/Mapping/FInfo.h" 
+#include "Support/CommandLine.h"
 using std::cerr;
 
 // Build the MachineInstruction Description Array...
@@ -20,6 +32,19 @@
 #include "SparcInstr.def"
 };
 
+//---------------------------------------------------------------------------
+// Command line options to control choice of code generation passes.
+//---------------------------------------------------------------------------
+
+static cl::opt<bool> DisablePreSelect("nopreselect",
+                                      cl::desc("Disable preselection pass"));
+
+static cl::opt<bool> DisableSched("nosched",
+                                  cl::desc("Disable local scheduling pass"));
+
+static cl::opt<bool> DisablePeephole("nopeephole",
+                                cl::desc("Disable peephole optimization pass"));
+
 //----------------------------------------------------------------------------
 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
@@ -88,6 +113,47 @@
   return offset;
 }
 
+//===---------------------------------------------------------------------===//
+// Default code generation passes.
+// 
+// Native code generation for a specified target.
+//===---------------------------------------------------------------------===//
+
+class ConstructMachineCodeForFunction : public FunctionPass {
+  TargetMachine &Target;
+public:
+  ConstructMachineCodeForFunction(TargetMachine &T) : Target(T) {}
+
+  const char *getPassName() const {
+    return "ConstructMachineCodeForFunction";
+  }
+
+  bool runOnFunction(Function &F) {
+    MachineFunction::construct(&F, Target);
+    return false;
+  }
+};
+
+struct FreeMachineCodeForFunction : public FunctionPass {
+  const char *getPassName() const { return "FreeMachineCodeForFunction"; }
+
+  static void freeMachineCode(Instruction &I) {
+    MachineCodeForInstruction::destroy(&I);
+  }
+  
+  bool runOnFunction(Function &F) {
+    for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
+      for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E; ++I)
+        MachineCodeForInstruction::get(I).dropAllReferences();
+    
+    for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
+      for_each(FI->begin(), FI->end(), freeMachineCode);
+    
+    return false;
+  }
+};
+
+
 
 //---------------------------------------------------------------------------
 // class UltraSparcMachine 
@@ -114,3 +180,56 @@
   maxAtomicMemOpWordSize = 8;
 }
 
+
+// addPassesToEmitAssembly - This method controls the entire code generation
+// process for the ultra sparc.
+//
+void UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
+{
+  // Construct and initialize the MachineFunction object for this fn.
+  PM.add(new ConstructMachineCodeForFunction(*this));
+
+  //Insert empty stackslots in the stack frame of each function
+  //so %fp+offset-8 and %fp+offset-16 are empty slots now!
+  PM.add(createStackSlotsPass(*this));
+
+  // Specialize LLVM code for this target machine and then
+  // run basic dataflow optimizations on LLVM code.
+  if (!DisablePreSelect)
+    {
+      PM.add(createPreSelectionPass(*this));
+      /* PM.add(createReassociatePass()); */
+      PM.add(createLICMPass());
+      PM.add(createGCSEPass());
+    }
+
+  PM.add(createInstructionSelectionPass(*this));
+
+  if (!DisableSched)
+    PM.add(createInstructionSchedulingWithSSAPass(*this));
+
+  PM.add(getRegisterAllocator(*this));
+
+  PM.add(getPrologEpilogInsertionPass());
+
+  if (!DisablePeephole)
+    PM.add(createPeepholeOptsPass(*this));
+
+  PM.add(MappingInfoForFunction(Out));  
+
+  // Output assembly language to the .s file.  Assembly emission is split into
+  // two parts: Function output and Global value output.  This is because
+  // function output is pipelined with all of the rest of code generation stuff,
+  // allowing machine code representations for functions to be free'd after the
+  // function has been emitted.
+  //
+  PM.add(getFunctionAsmPrinterPass(Out));
+  PM.add(new FreeMachineCodeForFunction());  // Free stuff no longer needed
+
+  // Emit Module level assembly after all of the functions have been processed.
+  PM.add(getModuleAsmPrinterPass(Out));
+
+  // Emit bytecode to the assembly file into its special section next
+  PM.add(getEmitBytecodeToAsmPass(Out));
+  PM.add(getFunctionInfo(Out)); 
+}


Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.68 llvm/lib/Target/Sparc/SparcInternals.h:1.69
--- llvm/lib/Target/Sparc/SparcInternals.h:1.68	Sun Oct 27 18:28:31 2002
+++ llvm/lib/Target/Sparc/SparcInternals.h	Sun Oct 27 19:03:43 2002
@@ -709,7 +709,6 @@
 //---------------------------------------------------------------------------
 
 class UltraSparc : public TargetMachine {
-private:
   UltraSparcInstrInfo instrInfo;
   UltraSparcSchedInfo schedInfo;
   UltraSparcRegInfo   regInfo;
@@ -725,6 +724,8 @@
   virtual const MachineFrameInfo &getFrameInfo() const { return frameInfo; }
   virtual const MachineCacheInfo &getCacheInfo() const { return cacheInfo; }
   virtual const MachineOptInfo   &getOptInfo()   const { return optInfo; }
+
+  virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
 
   // getPrologEpilogCodeInserter - Inserts prolog/epilog code.
   virtual Pass* getPrologEpilogInsertionPass();