[llvm-commits] CVS: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp SchedGraph.h

[Misha Brukman]

Changes in directory llvm/lib/CodeGen/InstrSched:

InstrScheduling.cpp updated: 1.43 -> 1.44
SchedGraph.h updated: 1.23 -> 1.24

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Log message:

Changed `MachineCodeForMethod' to `MachineFunction'.


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Diffs of the changes:

Index: llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
diff -u llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.43 llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.44
--- llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp:1.43	Tue Oct 22 22:30:42 2002
+++ llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp	Sun Oct 27 18:26:50 2002
@@ -9,7 +9,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/CodeGen/MachineCodeForBasicBlock.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/BasicBlock.h"
@@ -1542,7 +1542,7 @@
   if (SchedDebugLevel >= Sched_PrintMachineCode)
     {
       cerr << "\n*** Machine instructions after INSTRUCTION SCHEDULING\n";
-      MachineCodeForMethod::get(&F).dump();
+      MachineFunction::get(&F).dump();
     }
   
   return false;


Index: llvm/lib/CodeGen/InstrSched/SchedGraph.h
diff -u llvm/lib/CodeGen/InstrSched/SchedGraph.h:1.23 llvm/lib/CodeGen/InstrSched/SchedGraph.h:1.24
--- llvm/lib/CodeGen/InstrSched/SchedGraph.h:1.23	Fri Aug  9 15:07:54 2002
+++ llvm/lib/CodeGen/InstrSched/SchedGraph.h	Sun Oct 27 18:26:50 2002
@@ -31,7 +31,7 @@
 class ValueToDefVecMap;
 class RefVec;
 class MachineInstr;
-class MachineCodeForBasicBlock;
+class MachineBasicBlock;
 
 
 /******************** Exported Data Types and Constants ********************/
@@ -312,7 +312,7 @@
                                      const TargetMachine& target);
   
   void          addCallCCEdges      (const std::vector<SchedGraphNode*>& memNod,
-                                     MachineCodeForBasicBlock& bbMvec,
+                                     MachineBasicBlock& bbMvec,
                                      const TargetMachine& target);
     
   void		addMachineRegEdges	(RegToRefVecMap& regToRefVecMap,