[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h

[Chris Lattner]

Changes in directory llvm/include/llvm/CodeGen:

MachineInstr.h updated: 1.66 -> 1.67

---
Log message:

Small space optimization: Make MachineOperands take 16 bytes instead of
20 on intel or 24 on sparc


---
Diffs of the changes:

Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.66 llvm/include/llvm/CodeGen/MachineInstr.h:1.67
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.66	Mon Oct 21 08:24:50 2002
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Mon Oct 21 19:15:13 2002
@@ -72,8 +72,6 @@
   static const char LOFLAG64   = 0x20; // operand is %lo64(value_or_immedVal)
   
 private:
-  MachineOperandType opType;
-  
   union {
     Value*	value;		// BasicBlockVal for a label operand.
 				// ConstantVal for a non-address immediate.
@@ -83,10 +81,10 @@
     int64_t immedVal;		// constant value for an explicit constant
   };
 
+  MachineOperandType opType:8;  // Pack into 8 bits efficiently after flags.
+  char flags;                   // see bit field definitions above
   int regNum;	                // register number for an explicit register
                                 // will be set for a value after reg allocation
-  char flags;                   // see bit field definitions above
-  
 public:
   /*ctor*/		MachineOperand	();
   /*ctor*/		MachineOperand	(MachineOperandType operandType,
@@ -189,25 +187,18 @@
 
 inline
 MachineOperand::MachineOperand()
-  : opType(MO_VirtualRegister),
-    immedVal(0),
-    regNum(-1),
-    flags(0)
+  : immedVal(0), opType(MO_VirtualRegister), flags(0), regNum(-1)
 {}
 
 inline
 MachineOperand::MachineOperand(MachineOperandType operandType,
 			       Value* _val)
-  : opType(operandType),
-    immedVal(0),
-    regNum(-1),
-    flags(0)
+  : immedVal(0), opType(operandType), flags(0), regNum(-1)
 {}
 
 inline
 MachineOperand::MachineOperand(const MachineOperand& mo)
-  : opType(mo.opType),
-    flags(mo.flags)
+  : opType(mo.opType), flags(mo.flags)
 {
   switch(opType) {
   case MO_VirtualRegister:
@@ -276,7 +267,7 @@
 //      a CALL (if any), and return value of a RETURN.
 //---------------------------------------------------------------------------
 
-class MachineInstr :  public Annotable,         // Values are annotable
+class MachineInstr :  public Annotable,         // MachineInstrs are annotable
                       public NonCopyable {      // Disable copy operations
   MachineOpCode    opCode;              // the opcode
   OpCodeMask       opCodeMask;          // extra bits for variants of an opcode