[llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h TargetMachine.h

[Vikram Adve]

Changes in directory llvm/include/llvm/Target:

MachineInstrInfo.h updated: 1.20 -> 1.21
TargetMachine.h updated: 1.12 -> 1.13

---
Log message:

Added class MachineOptInfo as interface to target-specific
routines supporting machine code optimization.
Also added method MachineInstrInfo::getNOPOpCode().


---
Diffs of the changes:

Index: llvm/include/llvm/Target/MachineInstrInfo.h
diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.20 llvm/include/llvm/Target/MachineInstrInfo.h:1.21
--- llvm/include/llvm/Target/MachineInstrInfo.h:1.20	Mon Sep 16 10:56:01 2002
+++ llvm/include/llvm/Target/MachineInstrInfo.h	Thu Sep 19 19:50:44 2002
@@ -191,7 +191,7 @@
   bool isPseudoInstr(const MachineOpCode opCode) const {
     return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
   }
-  
+
   // Check if an instruction can be issued before its operands are ready,
   // or if a subsequent instruction that uses its result can be issued
   // before the results are ready.
@@ -265,7 +265,12 @@
   //-------------------------------------------------------------------------
   // Code generation support for creating individual machine instructions
   //-------------------------------------------------------------------------
-  
+
+  // Get certain common op codes for the current target.  this and all the
+  // Create* methods below should be moved to a machine code generation class
+  // 
+  virtual MachineOpCode getNOPOpCode() const = 0;
+
   // Create an instruction sequence to put the constant `val' into
   // the virtual register `dest'.  `val' may be a Constant or a
   // GlobalValue, viz., the constant address of a global variable or function.


Index: llvm/include/llvm/Target/TargetMachine.h
diff -u llvm/include/llvm/Target/TargetMachine.h:1.12 llvm/include/llvm/Target/TargetMachine.h:1.13
--- llvm/include/llvm/Target/TargetMachine.h:1.12	Mon Sep 16 10:39:35 2002
+++ llvm/include/llvm/Target/TargetMachine.h	Thu Sep 19 19:50:44 2002
@@ -16,6 +16,7 @@
 class MachineRegInfo;
 class MachineFrameInfo;
 class MachineCacheInfo;
+class MachineOptInfo;
 class PassManager;
 class Pass;
 
@@ -56,13 +57,17 @@
   // -- Instruction opcode and operand information
   // -- Pipelines and scheduling information
   // -- Register information
+  // -- Stack frame information
+  // -- Cache hierarchy information
+  // -- Machine-level optimization information (peephole only)
   // 
   virtual const MachineInstrInfo&       getInstrInfo() const = 0;
   virtual const MachineSchedInfo&       getSchedInfo() const = 0;
   virtual const MachineRegInfo&	        getRegInfo()   const = 0;
   virtual const MachineFrameInfo&       getFrameInfo() const = 0;
   virtual const MachineCacheInfo&       getCacheInfo() const = 0;
-  
+  virtual const MachineOptInfo&         getOptInfo()   const = 0;
+
   // Data storage information
   // 
   virtual unsigned int	findOptimalStorageSize	(const Type* ty) const;