[llvm-bugs] [Bug 39132] New: [amdgpu] rL343329: [InstCombine] don't propagate wider shufflevector arguments to predecessors cause regression in storing char3 vectors
via llvm-bugs
llvm-bugs at lists.llvm.org
Sat Sep 29 15:02:57 PDT 2018
https://bugs.llvm.org/show_bug.cgi?id=39132
Bug ID: 39132
Summary: [amdgpu] rL343329: [InstCombine] don't propagate
wider shufflevector arguments to predecessors cause
regression in storing char3 vectors
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedbugs at nondot.org
Reporter: jan.vesely at rutgers.edu
CC: llvm-bugs at lists.llvm.org
Created attachment 20942
--> https://bugs.llvm.org/attachment.cgi?id=20942&action=edit
piglit test that fails
this change introduces failures when loading/storing char3 vectors in
OpenCL (amdgcn backend):
llc: /home/orome/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4159:
llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const
llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags): Assertion
`VT.getSizeInBits() == Operand.getValueSizeInBits() && "Cannot BITCAST
between types of different sizes!"' failed.
Stack dump:
0. Program arguments: /home/orome/.local/bin/llc -march=amdgcn
1. Running pass 'CallGraph Pass Manager' on module '<stdin>'.
2. Running pass 'AMDGPU DAG->DAG Pattern Instruction Selection'
on function '@vload3_constant'
the patch changes how char3 vector is constructed. instead of starting
with <4xi8> (edited):
%3 = insertelement <4 x i8> undef, i8 %2, i32 0
%5 = insertelement <4 x i8> %3, i8 %4, i32 1
%7 = insertelement <4 x i8> %5, i8 %6, i32 2
store <4 x i8> %7, <4 x i8> addrspace(1)* %storetmp, align 4, !tbaa !11
it creates <3 x i8>, which is then shuffled into another <3 x i8>, which is
then bitcast to <4 x i8>:
%vecinit.i = insertelement <3 x i8> undef, i8 %2, i32 0
%vecinit1.i = insertelement <3 x i8> %vecinit.i, i8 %3, i32 1
%vecinit4.i = insertelement <3 x i8> %vecinit1.i, i8 %4, i32 2
%extractVec = shufflevector <3 x i8> %vecinit4.i, <3 x i8> undef, <4 x i32>
<i32 0, i32 1, i32 2, i32 undef>
%storetmp = bitcast <3 x i8> addrspace(1)* %out to <4 x i8> addrspace(1)*
^^^ I originally claimed that this one fails, but it's a pointer cast so it
really shouldn't
store <4 x i8> %extractVec, <4 x i8> addrspace(1)* %storetmp, align 4, !tbaa
!11
the attached .cl file will need libclc
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