[llvm-bugs] [Bug 39387] New: [X86] Two simple palignr shuffles become a two pshufbs and an or.

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=39387

            Bug ID: 39387
           Summary: [X86] Two simple palignr shuffles become a two pshufbs
                    and an or.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: craig.topper at gmail.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org

Given these two shuffles which can be represented by a 2 input palignr followed
by a fake unary palignr.

    t19: v16i8 =
vector_shuffle<11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26> t17, t16
  t23: v16i8 = vector_shuffle<10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9> t19,
undef:v16i8

A generic DAG combine turns it into

vector_shuffle<5,6,7,8,9,10,27,28,29,30,31,0,1,2,3,4> t16, t17

which we legalize to 2 pshufbs and an or like this

Creating new node: t136: v16i8 = BUILD_VECTOR Constant:i8<5>, Constant:i8<6>,
Constant:i8<7>, Constant:i8<8>, Constant:i8<9>, Constant:i8<10>,
Constant:i8<-128>, Constant:i8<-128>, Constant:i8<-128>, Constant:i8<-128>,
Constant:i8<-128>, Constant:i8<0>, Constant:i8<1>, Constant:i8<2>, Constant:i8
Creating new node: t137: v16i8 = X86ISD::PSHUFB t16, t136
Creating new node: t138: v16i8 = BUILD_VECTOR Constant:i8<-128>,
Constant:i8<-128>, Constant:i8<-128>, Constant:i8<-128>, Constant:i8<-128>,
Constant:i8<-128>, Constant:i8<11>, Constant:i8<12>, Constant:i8<13>,
Constant:i8<14>, Constant:i8<15>, Constant:i8<-128>, Constant:i8<-128>,
Constant:i8<-1
Creating new node: t139: v16i8 = X86ISD::PSHUFB t17, t138
Creating new node: t140: v16i8 = or t137, t139

and no target specific DAG combine will recover it.

Perhaps we should be less aggressive in isShuffleMaskLegal for byte sizes?

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