[llvm-bugs] [Bug 39653] New: Loop vectorizer miscompile; regression from r344613

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Nov 13 16:29:13 PST 2018


https://bugs.llvm.org/show_bug.cgi?id=39653

            Bug ID: 39653
           Summary: Loop vectorizer miscompile; regression from r344613
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Loop Optimizer
          Assignee: unassignedbugs at nondot.org
          Reporter: efriedma at codeaurora.org
                CC: anna at azul.com, ayal.zaks at intel.com,
                    llvm-bugs at lists.llvm.org

Testcase follows; optimize with opt -loop-vectorize.  The vectorizer completely
ignores the dependence between the load and store to the alloca, and vectorizes
anyway; this leads to a miscompile.

I can come up with an executable testcase, if necessary, but hopefully the
issue here is obvious enough.

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

define void @foo(i32 %arg, i32 %arg1, i64 %arg2, i16* %arg3, i32 %arg4, i64
%arg5) {
bb:
  %tmp = alloca i32
  store i32 %arg4, i32* %tmp
  %tmp6 = getelementptr inbounds i16, i16* %arg3, i64 %arg5
  br label %bb7

bb7:
  %tmp8 = phi i64 [ 0, %bb ], [ %tmp24, %bb7 ]
  %tmp9 = phi i32 [ %arg1, %bb ], [ %tmp23, %bb7 ]
  %tmp10 = load i32, i32* %tmp
  %tmp11 = mul nsw i32 %tmp9, %tmp10
  %tmp12 = srem i32 %tmp11, 65536
  %tmp13 = add nsw i32 %tmp12, %tmp9
  %tmp14 = trunc i32 %tmp13 to i16
  %tmp15 = trunc i64 %tmp8 to i32
  %tmp16 = add i32 %arg, %tmp15
  %tmp17 = zext i32 %tmp16 to i64
  %tmp18 = getelementptr inbounds i16, i16* %tmp6, i64 %tmp17
  store i16 %tmp14, i16* %tmp18, align 2
  %tmp19 = add i32 %tmp13, %tmp9
  %tmp20 = trunc i32 %tmp19 to i16
  %tmp21 = and i16 %tmp20, 255
  %tmp22 = getelementptr inbounds i16, i16* %arg3, i64 %tmp17
  store i16 %tmp21, i16* %tmp22, align 2
  %tmp23 = add nsw i32 %tmp9, 1
  %tmp24 = add nuw nsw i64 %tmp8, 1
  %tmp25 = icmp eq i64 %tmp24, %arg2
  store i32 %tmp12, i32* %tmp
  br i1 %tmp25, label %bb26, label %bb7

bb26:
  ret void
}

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