[llvm-bugs] [Bug 26161] [GlobalISel] Value to vreg during IR to MachineInstr translation for aggregate type

via llvm-bugs llvm-bugs at lists.llvm.org
Fri May 18 06:34:19 PDT 2018


https://bugs.llvm.org/show_bug.cgi?id=26161

Amara Emerson <aemerson at apple.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #1 from Amara Emerson <aemerson at apple.com> ---
We now split aggregates into multiple Regs as of r332449.

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