[llvm-bugs] [Bug 37452] New: Potential improvement for checking if condition on ARM32

via llvm-bugs llvm-bugs at lists.llvm.org
Mon May 14 07:41:00 PDT 2018


https://bugs.llvm.org/show_bug.cgi?id=37452

            Bug ID: 37452
           Summary: Potential improvement for checking if condition on
                    ARM32
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Keywords: performance
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: lidija.besker at rt-rk.com
                CC: llvm-bugs at lists.llvm.org, mips32r2 at gmail.com

I have been looking into functions compiled for ARM32 and I noticed a excess
instructions in results generated by LLVM. In function foo value in R0 is
checked whether it is 0 and only in case when it is 0 is set to 0 (cmp and
moveq instructions). Objdump of test case given below was compiled with
optimization for size.

For example:

typedef struct k
{
        int m;
        int n;
} str_k;

extern str_k* bar(str_k* a, int b);

int foo(str_k* a, int b){
        if(a == NULL) return 0;                                                 
        bar(a, b);
        return b-a->n;
}

clang generated:

00000000 <foo>:
   0:   e3500000        cmp     r0, #0
   4:   03a00000        moveq   r0, #0
   8:   012fff1e        bxeq    lr
   c:   e92d4830        push    {r4, r5, fp, lr}
  10:   e28db008        add     fp, sp, #8
  14:   e1a04001        mov     r4, r1
  18:   e1a05000        mov     r5, r0
  1c:   ebfffffe        bl      0 <bar>
  20:   e5950004        ldr     r0, [r5, #4]
  24:   e0440000        sub     r0, r4, r0
  28:   e8bd4830        pop     {r4, r5, fp, lr}
  2c:   e12fff1e        bx      lr

Not a big difference but expanding condition will cause it to get worse, so
fixing this should improve the code size.

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