[llvm-bugs] [Bug 36721] New: unnecessary andl for %cl when shifting

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=36721

            Bug ID: 36721
           Summary: unnecessary andl for %cl when shifting
           Product: libraries
           Version: 6.0
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: nruslan_devel at yahoo.com
                CC: llvm-bugs at lists.llvm.org

Noticed that depending on the type specified as a shift parameter, llvm may
generate unnecessary 'and' instruction. Note: shifting instructions in
x86-64/x86 should ignore upper bits of the CX register (i.e., the value is
implicitly masked). This seems to be handled by clang/llvm when 1-byte type is
used, but when 'unsigned int' is used, it still masks the value for some
reason.

For example, 

1.

__uint128_t func(__uint128_t a, unsigned char shift)
{
    return a << (shift & 63);
}

generates a code without extra 'and'

func:                                   # @func
    .cfi_startproc
# %bb.0:
    movl    %edx, %ecx
    shldq   %cl, %rdi, %rsi
                                        # kill: def %cl killed %cl killed %ecx
    shlq    %cl, %rdi
    movq    %rdi, %rax
    movq    %rsi, %rdx
    retq


2. whereas

__uint128_t func(__uint128_t a, unsigned int shift)
{
    return a << (shift & 63);
}


generates (notice extra 'andl    $63, %ecx'):

func:                                   # @func
    .cfi_startproc
# %bb.0:
    movl    %edx, %ecx
    andl    $63, %ecx
    shldq   %cl, %rdi, %rsi
                                        # kill: def %cl killed %cl killed %ecx
    shlq    %cl, %rdi
    movq    %rdi, %rax
    movq    %rsi, %rdx
    retq

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