[llvm-bugs] [Bug 36707] New: clang 6 generates invalid instruction on ARM64

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=36707

            Bug ID: 36707
           Summary: clang 6 generates invalid instruction on ARM64
           Product: clang
           Version: 6.0
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: -New Bugs
          Assignee: unassignedclangbugs at nondot.org
          Reporter: mikulas at artax.karlin.mff.cuni.cz
                CC: llvm-bugs at lists.llvm.org

Created attachment 20055
  --> https://bugs.llvm.org/attachment.cgi?id=20055&action=edit
a file that reproduces the bug

clang 6.0 generates invalid instruction "fmov h0,wzr". This instruction is
allowed starting with ARMv8.2, but clang generates it even for ARMv8.0. On
ARMv8.0 processor, the instruction causes SIGILL.

This bug is new to clang 6.0, clang 5.0 behaves correctly.

See the attached file and compile it with -O2.

00000000004005c0 <ret0>:
  4005c0:       1ee703e0        fmov    h0, wzr
  4005c4:       d65f03c0        ret

Note that if you compile the file with "-O2 -no-integrated-as", you get this
error:
/tmp/ret-fp16-87b066.s: Assembler messages:
/tmp/ret-fp16-87b066.s:8: Error: selected processor does not support `fmov
h0,wzr'
clang-6.0: error: assembler command failed with exit code 1 (use -v to see
invocation)

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