[llvm-bugs] [Bug 36080] New: LLVM miscompiles variadic functions with overaligned stack when targeting Thumb1

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=36080

            Bug ID: 36080
           Summary: LLVM miscompiles variadic functions with overaligned
                    stack when targeting Thumb1
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: momchil.velikov at arm.com
                CC: llvm-bugs at lists.llvm.org

Created attachment 19742
  --> https://bugs.llvm.org/attachment.cgi?id=19742&action=edit
minimal testcase

When compiling for Arm architecture, which implements only the 16-bit Thumb
instruction set (like Armv4t or Armv6m) a variadic function, which has
increased stack alignment requirements (so it dynamically re-aligns the SP),
the Arm back end generates invalid code to store the incoming variadic
arguments, which are passed in registers.

When the attached test case is compiled via

    clang -target thumbv6m-eabi -O2 -S variadic-stack-align.c

the generated assembly looks like:

    test:
        .fnstart
        .pad    #12
        sub     sp, #12            ; allocate space for variadic register args
        .save   {r4, r6, r7, lr}
        push    {r4, r6, r7, lr}
        .setfp  r7, sp, #8
        add     r7, sp, #8
        .pad    #36
        sub     sp, #36         ;
        mov     r4, sp          ;
        lsrs    r4, r4, #5      ; Align stack pointer
        lsls    r4, r4, #5      ;
        mov     sp, r4          ;

        str     r3, [sp, #60]   ;
        str     r2, [sp, #56]   ; Store incoming arguments
        str     r1, [sp, #52]   ;

        ...


The offsets, used to store the register varargs are not correct after the SP is
aligned.  Instead, the function should store these arguments via the FP.

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