[llvm-bugs] [Bug 36031] New: [arm] After r203575, Bad machine code: Using an undefined physical register
via llvm-bugs
llvm-bugs at lists.llvm.org
Sun Jan 21 12:38:27 PST 2018
https://bugs.llvm.org/show_bug.cgi?id=36031
Bug ID: 36031
Summary: [arm] After r203575, Bad machine code: Using an
undefined physical register
Product: new-bugs
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: dimitry at andric.com
CC: llvm-bugs at lists.llvm.org
As reported in https://bugs.freebsd.org/225278, building the FreeBSD
mail/deforaos-mailer port for armv6 results in "Bad machine code: Using an
undefined physical register" errors.
These errors still occur with trunk r322755.
Minimized test case:
/* clang -cc1 -triple armv6kz -S -target-cpu arm1176jzf-s -O1 -stack-protector
3 message-minimized.c */
static struct {
const int a;
int (*b)();
} c[];
int d;
void e() { c[d].b(0, 0); }
Error output:
# Machine code for function e: NoPHIs, TracksLiveness
Frame Objects:
fi#0: size=4, align=4, at location [SP]
%bb.0: derived from LLVM BB %entry
%1:gpr = LDRLIT_ga_pcrel_ldr target-flags(arm-got) @d; mem:LD4[GOT]
%2:gpr = LDRi12 %1, 0, 14, %noreg;
mem:LD4[@d](tbaa=!4)(dereferenceable)
%3:gpr = LDRLIT_ga_pcrel_ldr target-flags(arm-got) @__stack_chk_guard;
mem:LD4[GOT]
%4:gpr = LDRi12 %3, 0, 14, %noreg; mem:Volatile LD4[@__stack_chk_guard]
STRi12 %4, %stack.0.StackGuardSlot, 0, 14, %noreg; mem:Volatile
ST4[FixedStack0]
%9:gpr = LDRi12 %3, 0, 14, %noreg; mem:Volatile LD4[@__stack_chk_guard]
%10:gpr = LDRi12 %stack.0.StackGuardSlot, 0, 14, %noreg; mem:Volatile
LD4[FixedStack0]
dead %11:gpr = SUBrr %9, %10, 14, %noreg, def %cpsr
Bcc %bb.1, 1, killed %cpsr
B %bb.2
Successors according to CFG: %bb.2(0x7ffff800 / 0x80000000 = 100.00%)
%bb.1(0x00000800 / 0x80000000 = 0.00%)
%bb.1: derived from LLVM BB %entry
Predecessors according to CFG: %bb.0
ADJCALLSTACKDOWN 0, 0, 14, %noreg, implicit-def dead %sp, implicit %sp
BL &__stack_chk_fail, <regmask %lr %d8 %d9 %d10 %d11 %d12 %d13 %d14
%d15 %q4 %q5 %q6 %q7 %r4 %r5 %r6 %r7 %r8 %r9 %r10 %r11 %s16 %s17 %s18 %s19 %s20
%s21 %s22 %s23 %s24 %s25 %s26 %s27 and 35 more...>, implicit-def dead %lr,
implicit %sp, implicit-def %sp
ADJCALLSTACKUP 0, 0, 14, %noreg, implicit-def dead %sp, implicit %sp
%bb.2: derived from LLVM BB %entry
Predecessors according to CFG: %bb.0
%0:gpr = LDRLIT_ga_pcrel @c
%5:gpr = ADDrsi %0, %2, 26, 14, %noreg, %noreg
%7:tcgpr = LDRi12 %5, 4, 14, %noreg; mem:LD4[%2](tbaa=!8)
TCRETURNri %7, implicit %sp, implicit %r0, implicit killed %r1
# End machine code for function e.
*** Bad machine code: Using an undefined physical register ***
- function: e
- basic block: %bb.2 entry (0x8051cc618)
- instruction: TCRETURNri
- operand 2: implicit %r0
*** Bad machine code: Using an undefined physical register ***
- function: e
- basic block: %bb.2 entry (0x8051cc618)
- instruction: TCRETURNri
- operand 3: implicit killed %r1
fatal error: error in backend: Found 2 machine code errors.
It seems to have something to do with stack protector, since using
-stack-protector 2 makes the problem go away.
Bisection showed this regressed with https://reviews.llvm.org/rL203575 ("ARM:
enable tail call optimisation on Thumb 2") by Saleem Abdulrasool.
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