[llvm-bugs] [Bug 35958] New: [GlobalISel] CodeModel::Large sequences are not emitted

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35958

            Bug ID: 35958
           Summary: [GlobalISel] CodeModel::Large sequences are not
                    emitted
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: roger.ferreribanez at arm.com
                CC: llvm-bugs at lists.llvm.org, qcolombet at apple.com

Created attachment 19680
  --> https://bugs.llvm.org/attachment.cgi?id=19680&action=edit
C Testcase

Hi all,

the following testcase needs to be built with -mcmodel=large as it accesses
huge arrays.

-- t.c
#define BIG    (1024*1024*1024)

int foo1[BIG];
int foo2[BIG];

int main(void)
{
  return foo1[0] + foo2[0];
}
-- end of t.c

unfortunately GlobalISel seems to be unable to select the "large" sequence of
instructions.

$ aarch64-linux-gnu-clang  -DADJUST=0 -o t.exe t.c -mcmodel=large 
/tmp/t-0e2765.o: In function `main':
t.c:(.text+0x4): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21
against symbol `foo1' defined in COMMON section in /tmp/t-0e2765.o
clang-6.0: error: linker command failed with exit code 1 (use -v to see
invocation)

Looking at the generated GMir

%bb.1: derived from LLVM BB %entry
        %1:_(s32) = G_CONSTANT i32 0
        %4:_(p0) = G_GLOBAL_VALUE @foo1
        %3:_(p0) = COPY %4(p0)
        %7:_(p0) = G_GLOBAL_VALUE @foo2
        %6:_(p0) = COPY %7(p0)
        ...

looks like G_GLOBAL_VALUE is lowered by the InstructionSelector to the pseudo
MOVaddr:

Selecting: 
  %4:gpr(p0) = G_GLOBAL_VALUE @foo1
(... tons of gibberish ...)
Into:
  %4:gpr64(p0) = MOVaddr target-flags(aarch64-page) @foo1,
target-flags(aarch64-pageoff, aarch64-nc) @foo1

which is later expanded to

%x8 = ADRP target-flags(aarch64-page) @foo1
renamable %x8 = ADDXri %x8, target-flags(aarch64-pageoff, aarch64-nc) @foo1, 0

which ends being

adrp    x8, foo1
add     x8, x8, :lo12:foo1

which will cause the linker failure.

Disabling GlobalISel via -mllvm -global-isel=0 we see that the expected
sequence is generated

movz    x9, #:abs_g0_nc:foo1
movk    x9, #:abs_g1_nc:foo1
movk    x9, #:abs_g2_nc:foo1
movk    x9, #:abs_g3:foo1

SelectionDAG strategy is a bit different: it wraps the ISD::GlobalAddress
during legalization into a AArch64ISD::WrapperLarge and then uses a Pat<...> to
expand it.

Kind regards,
Roger

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20180116/ef6b84a8/attachment.html>