[llvm-bugs] [Bug 35948] New: Why FeatureSlowPMULLD is not set for Haswell+?

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35948

            Bug ID: 35948
           Summary: Why FeatureSlowPMULLD is not set for Haswell+?
           Product: libraries
           Version: 6.0
          Hardware: All
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: nekotekina at gmail.com
                CC: llvm-bugs at lists.llvm.org

Hello, it seems that LLVM sets this flag for Silvermont processors, but not
others. On Haswell or Skylake processors (for example), PMULLD has latency 10,
when other vector multiplication instructions have latency 5.

https://bugs.llvm.org/show_bug.cgi?id=28128 seems related.

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